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ISO 7816(1-3) Smart Card Standard(一)

Part1: Physical Charcteristics of Integrated Circuit Cards
 

This part describes the physical charcteristics of integrated circuit cards. It includes accomodation of exposure limits for a number of electromagnetic phenomena such as X-rays, UV light, elacromagnetic fields, static electrical fields, and ambient temperature of the card.

Furthermore ISO7816-1 defines the characteristics of a card when it is bent or flexed. This is to make sure that plastic cards with embedded chips are manufactured in a way that guarantees flawless operation over the expected life time of a card. Connections beween the surface connectors and the I/O pins of the embedded silicon die must be maintaned and withstand mechanical stress. Bending and flexing procedures are standardised in ISO 7816.

This part of ISO7816 is important for card manufacturers. They are the ones that choose the materials and establish a process that embeds the integrated circuit into the card.

Part 2: Dimensions and Location of the Contacts

ISO 7816 part 2 defines the dimensions and location of the contacts. This part includes standards about number, function and position of the electrical contacts.

The integrated circuit card (ICC) has 8 electrical contacts . They are referred to as C1 through C8. However, not all 8 contacts are electrically connected to the embedded microprocessor chip and therefore unused at the present time.

The following table contains the contact definition according to ISO7816-2

Contact Designation Use
C1 Vcc Power connection through which operating power is supplied to the microprocessor chip in the card
C2 RST Reset line through which the IFD can signal to the smart card's microprocessor chip to initiate its reset sequence of instructions
C3 CLK Clock signal line t hrough which a clock signal can be provided to the microprocessor chip. This line controls the operation speed and provides a common framework for data communication between the IFD and the ICC
C4 RFU Reserved for future use
C5 GND Ground line providing common electrical ground between the IFD and the ICC
C6 Vpp Programming power connection used to program EEPROM of first generation ICCs.
C7 I/O Input/output line that provides a half-duplex communication channel between the reader and the smart card
C8 RFU Reserved for future use

Remark:

Some smart cards issued before 1990 were adherent to a different standard for the contact location and therefore can't be used with today's ISO7816-2 compliant smart card readers. These cards were deployed primarily in Europe.

 

Part 3: Electronic Signals and Transmission Protocols (1)

This part describes electronic signals and transmission protocols of integrated circuit cards. We copied it from a version that is available on the Internet. If you need the official version of this part, please contact ISO in switzerland.. If you have suggestions or material to include (tables, graphs etc) please contact us. The document will stay at this location for anyone that wants a direct link to this part of the standard. We will edit this document shortly, bring it up to date and add comments.

Most of ISO7816 3 is important for reader manufacturers or developers who want to establish a communication with a smart card on a very low level, the signal level. Going through ISO 7816-3 you will see what's involved in writing your own I/O software. This can be either to communicate from a microcontroller or a PC's serial/parallel/USB/PCMCIA port. Even if you don't go that far, it is quite interesting to read about what you can get out of an Answer to Reset (ATR).

There are many tools out there to read an ATR. Even on this site we put a remote version of a free ATR probing tool that reads and interprets an ATR over the Internet. All you need is a PCSC compliant smart card reader attached to a PC with an Internet connection.

Electrical Signals Description

I/O : Input or Output for serial data to the integrated circuit inside the card.

VPP : Programing voltage input (optional use by the card).

GND : Ground (reference voltage).

CLK : Clocking or timing signal (optional use by the card).

RST : Either used itself (reset signal supplied from the interface device) or in combination with an interal reset control circuit (optional use by the card). If internal reset is implemented, the voltage
supply on Vcc is mandatory.

VCC : Power supply input (optional use by the card).


NOTE - The use of th two remaining contacts will be defined in the appropriate application standards.

ISO7816 3.1 Voltage and current values

Abbreviations:

Vih : High level input voltage
Vil : Low level input voltage
Vcc : Power supply voltage at VCC
Vpp : Programming voltage at VPP
Voh : High level output voltage
Vol : Low level output voltage
tr : Rise time between 10% and 90% of signal amplitude
tf : Fall time between 90% and 10% of signal amplitude
Iih : High level input current
Iil : Low level input current
Icc : Supply current at VCC
Ipp : Programming current at VPP
Ioh : High level output current
Iol : Low level output current
Cin : Input capacitance
Cout: Output capacitance


* I/O

This contact is used as input (reception mode) or output (transmission mode) for data exchange. Two possible states exist for I/O:

- mark or high state (State Z), if the card and the interface device are in reception mode or if the state is imposed by the transmitter.

- space or low state (State A), if this state is imposed by the
transmitter.

When the two ends of the line are in reception mode, the line shall be maintained in state Z. When the two ends are in non-matced transmit mode, the logic state of the line may be indeterminate. During operations, the interface device and the card shall not both be in transmit mode.


Table 1 - Electrical characteristics of I/O under normal operation conditions.

,--------+--------------------------------+---------+---------+------,
| Symbol |          Conditions            | Minimum | Maximum | Unit |
+--------+--------+-----------------------+---------+---------+------+
|        | Either | Iih max = +/- 500uA   |    2    |    VCC  |   V  |
|  Vih   |   (1)  +-----------------------+---------+---------+------+
|        |   or   | Iih max = +/- 50uA    | 0.7 VCC | VCC (3) |   V  |
+--------+--------+-----------------------+---------+---------+------+
|  Vil   |          Iil max = 1mA         |    0    |    0.8  |   V  |
+--------+--------------------------------+---------+---------+------+
|        | Either | Iol max = +/- 100uA   |   2.4   |    VCC  |   V  |
|  Voh   |        +-----------------------+---------+---------+------+
|    (2) |   or   | Iol max = +/- 20uA    |   3.8   |    VCC  |   V  |
+--------+--------+-----------------------+---------+---------+------+
|  Vol   |          Iol max = 1mA         |    0    |    0.4  |   V  |
+--------+--------------------------------+---------+---------+------+
| tr, tf | Cin = 30pF;   Cout = 30pF      |         |      1  |   us |
+--------+--------------------------------+---------+---------+------+
| (1) For the interface device, take into account both conditions.   |
| (2) It is assumed that a pull up resistor is used in the interface |
|     device (recommended value 20k Ohm.                             |
| (3) The voltage on I/O shall remain between 0.3V and VCC+0.3V.     |
'--------------------------------------------------------------------'


* VPP
This contact may be to supply the voltage required to program or to erase the internal non-volatile memory. Two possible states exists for VPP: Idle state and active state, as defined in table 2. The idle state shall be maintained by the interface device unless the active state is required.


Table 2 : Electrical characteristics of VPP under normal operation conditions.

,--------+--------------------------------+---------+---------+------,
| Symbol |          Conditions            | Minimum | Maximum | Unit |
+--------+--------------------------------+---------+---------+------+
|  Vpp   |         Idle State             | 0.95*Vcc| 1.05*Vcc|   V  |
|  Ipp   |   (programming non active)     |         |   20    |  mA  |
+--------+--------------------------------+---------+---------+------+
|  Vpp   |        Active State            | 0.975*P | 1.025*P |   V  |
|  Ipp   |    (programming the card)      |         |     I   |  mA  |
+--------+--------------------------------+---------+---------+------+
| The card provides the interface with the values of P and I         |
| (default values: P=5 and I=50)                                     |
'--------------------------------------------------------------------'

Rise of fall time : 200 us maximum. The rate of change of Vpp shall not exceed 2V/us.
The maximum power Vpp*Ipp shall not exceed 1.5W when averaged over any period of 1s.


* CLK

The actual frequency, delivered by the interface device on CLK, is designated either by fi the initial frequency during the answer to reset, or by fs the subsequent frequency during subsequent transmission.

Duty cycle for asynchronous operations shall be between 45% and 55% of the period during stable operation. Care shall be taken when switching frequencies (from fi to fs) to ensure that no pulse is shorter than 45% of the shorter period.


Table 3 - Electrical characteristics of CLK under normal operation conditions.

     ,--------+--------------------------------+---------+---------+------,
     | Symbol |          Conditions            | Minimum | Maximum | Unit |
     +--------+--------+-----------------------+---------+---------+------+
     |        | Either | Iih max = +/- 200uA   |   2.4   | VCC (2) |   V  |
     |        |   (1)  +-----------------------+---------+---------+------+
     |  Vih   |   or   | Iih max = +/- 20uA    | 0.7*VCC | VCC (2) |   V  |
     |        |   (1)  +-----------------------+---------+---------+------+
     |        |   or   | Iih max = +/- 10uA    | VCC-0.7 | VCC (2) |   V  |
     +--------+--------+-----------------------+---------+---------+------+
     |  Vil   |          Iil max = +/-200 uA   |   0 (2) |    0.5  |   V  |
     +--------+--------------------------------+---------+---------+------+
     | tr, tf |          Cin = 30pF            |         |9% of the period|
     |        |                                |         |with a max:0.5us|
     +--------+--------------------------------+---------+---------+------+
     | (1) For the interface device, take into account three conditions.  |
     | (2) The voltage on CLK shall remain between 0.3V and Vcc+0.3V.     |
     '--------------------------------------------------------------------'

* RST

Table 4 - Electrical characteristics of RST under normal operation conditions.

     ,--------+--------------------------------+---------+---------+------,
     | Symbol |          Conditions            | Minimum | Maximum | Unit |
     +--------+--------+-----------------------+---------+---------+------+
     |        | Either | Iih max = +/- 200uA   |    4    | VCC (2) |   V  |
     |  Vih   |   (1)  +-----------------------+---------+---------+------+
     |        |   or   | Iih max = +/- 10uA    | VCC-0.7 | VCC (2) |   V  |
     +--------+--------+-----------------------+---------+---------+------+
     |  Vil   |          Iil max = +/- 200uA   |   0 (2) |    0.6  |   V  |
     +--------+--------------------------------+---------+---------+------+
     | (1) For the interface device, take into account both conditions.   |
     | (2) The voltage on RST shall remain between 0.3V and VCC+0.3V.     |
     '--------------------------------------------------------------------'

* VCC

This contact is used to supply the power voltage Vcc.


Table 5 - Electrical characteristics of VCC under normal operation conditions.

              ,--------+---------+---------+-------,
              | Symbol | Minimum | Maximum |  Unit |
              +--------+---------+---------+-------+
              |  Vcc   |   4.75  |   5.25  |   V   |
              |  Icc   |         |    200  |  mA   |
              '--------+---------+---------+-------'

ISO7816 3.2 Operating procedure for integrated circuit(s) cards

This operating procedure applies to every integrated circuit(s) card with contacts:

The dialogue between the interface device and the the card shall be conducted through the consecutive operations:

- connection and activation of the contacts by the interface device.
- reset of the card.
- answer to reset by the card.
- subsequent information exchange between the card and the interface device.
- desactivation of the contacts by the interface device.

These operations are specified in the following subclauses.

NOTE :
An active state on VPP should not only be provided and maintained when requested by the card.

ISO7816 3.2.a - Connection and activation of the contacts

The electrical circuits shall not be activated until the contacts are connected to the interface device so as to avoid possible damage to any card meeting these standards.

The activation of the contacts by the interface device shall consist of the consecutive operations:

- RST is in state L;
- VCC shall be powered;
- I/O in the interface device shall be put in reception mode;
- VPP shall be raised to idle state;
- CLK shallbe provided with a suitable and stable clock.


ISO7816 3.2.b - Reset of the card

A card reset is initiated by the interface device, whereupon the card shall respond with an Answer to Reset as describe in 2.4.

By the end of the activation of the contacts (RST is in L, VCC powered and stable, I/O in reception mode in the interface device, VPP stable at idle level, CLK provided with a suitable and stable clock), the card answering asynchronously is ready for reset.

The clock signal is applied to CLK at time T0. The I/O line shall be set to state Z within 200 clcok cycles of the clock signal (t2) being applied to CLK (time t2 after T0).

An internally reset card reset after a few cycles of clock signal. The Answer to Reset on I/O shall begin between 400 and 40 000 clock cycles (t1) after the clock signal is applied to CLK (time t1 after T0).

A card with an active low reset is reset by maintaining RST in state L for at least 40 000 clock cycles (t3) after the clock signal is applied on CLK (time t3 after T0). Thus if no Answer to Reset begind within 40 000 clock cycles (t3) with RST in state L, RST is put to state H (at time T1). The
Answer to Reset on I/O shall begin between 400 and 40 000 clock cycles (t1) after the rising edge of the signal on RST (time t1 after T1).

If the Anwser to Reset does not begin within 40 000 clock cycles (t3) with RST in state H (t3 after T1), the signal on RST shall be returned to state L (at time T2) and the contacts shall be desactivated by the interface device.

GND ________________________________________________________________________
      __________________________________________________________________
VCC _| :                                                               :|___
       :_______________________________________________________________:
VPP __|:                                                               |____
       :             t3                            t3                  :
       :<--------------------------->:<------------------------------->:
       :                             :_________________________________:
RST ___:_____________________________|                                 |____
       :                             :                                 :
CLK ___|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||____
       :       t1                    :                                 :
       :<-------------->:            :                                 :
       :      __________:____________:_________________________________:
I/O __XXXXXXXX          |____________:_______Answer____________________:XXXX
(IR)   :      :                      :                                 :
       :  t2  :                      :      t1                         :
       :<---->:                      :<---------->:                    :
       :      _______________________:_________________________________:
I/O __XXXXXXXX                       :            |______Answer________:XXXX
(AL)   :  t2  :                      :                                 :
       :<---->:                      :                                 :
       :                             :_________________________________:
I/O __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX:                                 :XXXXX
(SH)   :                             :                                 :
       T0                            T1                                T2
       IR : Internal Reset                t2 <= 200/fi
  AL : Asynchronous Reset            400/fi <= t1 <= 40000/fi
  SH : Syncronous Reset              40000/fi <= t3

                      Figure1 : Reset of the card
					  

With a card answering synchonously, the interface device sets all the lines to state L (See figure 2). VCC is the powered, VPP is set to idle state, CLK and RST remain in L state, I/O is put in reception mode in the interface device, RST shall be maintained in state H for at least 50 us (t12), before returning to state L again.

The clock pulse is applied after an interval (t10) from the rising edge of the reset signal. The duration of the state H of the clock pulse can be any value between 10 us and 50 us ; no more than one clock pulse during reset high is allowed. The time interval between the falling edges on CLK
and RST is t11.

The first data bit is obtained as an answer to reset on I/O while CLK is in state L and is valid after an interval t13 from the falling edge on RST.

      ______________________________________________________________________
VCC__/

       _____________________________________________________________________
VPP___/
                 t12
         :<---------------->:
         :__________________:
RST_____/:                   /_______________________________________________
         :                    :
         :  t10           t11 :          t15      t16
         :<---->:      :<---->:  t14   :<---->: :<---->:
                : ____ :      :<---->: :______: :      : _______
CLK_____________:/  1 /:______:______:/   2    /:______:/   3   /_______
                              :                 :
                              : t13             :  t17
                              :<---->:          :<---->:
       _____________________________ :______________   :______________   ___
I/O___///////////////////////////////:_______1______X-X_______2_______X-X___

5us  <= t10                          10us <= t14 <= 100us Clock low after RST
5us  <= t11                          10us <= t15 <= 50us  Clock High
50us <= t12 ........ Reset High      10us <= t16 <= 100us Clock Low
t13  <= 10us  Propagation delay      t17 <= 10us  Propagation delay

           Figure2 : Reset of the card when a synchronous answer is expected.


NOTES:

1 - The internal state of the card is assumed not to be defined before reset. Therefore the design of the card has to avoid inproper operation.

2 - In order to continue the dialogue with the card, RST shall be maintained in the state where an answer occurs on I/O.

3 - Reset of a card can be initiated by the interface device at its discetion at any time.

4 - Interface devices may support one or more of these types of reset behaviour. The priority of testing for asynchronous or synchronous cards is not defined in this standard.

 
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