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RSS订阅原创 laura（mips）操作cp2
添加系统调用来操作laura的cp2寄存器，但是自测发现要不就是根本不能使用，勉强能使用也是计数不准，今天仔细看了代码，找到了原因。 larua平台的performance相关寄存器在cp2。要读写cp2的相关寄存器首先要使能cp0 status寄存器的CU2（bit[30]）。但是默认是不使能CU2。 Linux系统分内核态和用户态，CU0（bit[28]）用来区别用户态和内核态。系统陷入内核态时会保存cp0 status寄存器的值并使能CU0，返回用户态时恢复cp0 status
2011-03-30 20:15:00
1506
ARM® Architecture Reference Manual ARMv7-A and ARMv7-R edition
ARM® Architecture Reference Manual
ARMv7-A and ARMv7-R edition
2018-06-15
Bare-metal Boot Code for ARMv8-A Processors
Hardware verification engineers often run bare-metal tests to verify core-related function in a System on Chip (SoC). However, it can be challenging to write boot code for a bare-metal system, without a basic understanding of software development on the ARM architecture.
This application note provides code examples for the following important operations that are involved in booting a bare-metal system:
• Initializing exceptions.
• Initializing registers.
• Configuring the MMU and caches.
• Enabling NEON and Floating Point.
• Changing Exception levels.
The code examples are written with the GNU assembly grammar and are tested on the Cortex-A53, Cortex-A72, and Cortex-A73 processors. They also apply to other ARMv8-A processors.
2018-05-29
ARM Generic Interrupt Controller Architecture Specification (3.0 & 4.0)
ARM Generic Interrupt Controller Architecture Specification (GIC architecture version 3.0 and version 4.0)
2018-05-04
Brief Introduction to MIPS32 Shadow Registers
Brief Introduction to MIPS32 Core Shadow Registers for Microcontroller Applications
2011-10-10
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