Memory-partition是在进行内存寻址进行读或者写数据的时候,我们寻找地址一般是全部比较一遍,但是我们可以就是先比较第一位,然后在比较接下来的位数。这样就减少了近一般的内存访问次数,大大降低了功耗。
在这里,我定义了地址空间为十六,字长也为十六的内存mem。这个内存是有读和写的功能。首先向内存mem中写入数据,然后再读数据。我们的memory-partition主要是在寻址的时候通过分成两段来减少动态功耗。
有memory-partition的代码:
module memory2(
clr, //reset
clk, //clock
address, //address for read or write
read_en, //read enable
write_en, //写使能
read_data, //读使能
write_data //读的数据
);
input wire clr; //reset
input wire clk; //clock
input wire [3:0]address; //address for read or write
input wire read_en; //read_enable signal
input wire write_en; //write_enable signal
output reg [15:0]read_data; //the data you read from the memory
input wire [15:0]write_data; //write data to memory
reg [15:0]mem[15:0]; //get a 16*16's memory
always@(posedge clr,posedge clk)
begin
if(clr)
begin
mem[0] <= 16'b0;
mem[1] <= 16'b0;
mem[2] <= 16'b0;
mem[3] <= 16'b0;
mem[4] <= 16'b0;
mem[5] <= 16'b0;
mem[6] <= 16'b0;
mem[7] <= 16'b0;
mem[8] <= 16'b0;
mem[9] <= 16'b0;
mem[10] <= 16'b0;
mem[11] <= 16'b0;
mem[12] <= 16'b0;
mem[13] <= 16'b0;
mem[14] <= 16'b0;
mem[15] <= 16'b0;
end
else if(write_en == 1'b1)
begin
if(address[3] == 1'b0)
begin
if(address[2:0] == 3'b000)
mem[0] <= write_data;
else if(address[2:0] == 3'b001)
mem[1] <= write_data;
else if(address[2:0] == 3'b010)
mem[2] <= write_data;
else if(address[2:0] == 3'b011)
mem[3] <= write_data;
else if(address[2:0] == 3'b100)
mem[4] <= write_data;
else if(address[2:0] == 3'b101)
mem[5] <= write_data;
else if(address[2:0] == 3'b110)
mem[6] <= write_data;
else if(address[2:0] == 3'b111)
mem[7] <= write_data;
end
else
begin
if(address[2:0] == 3'b000)
mem[8] <= write_data;
else if(address[2:0] == 3'b001)
mem[9] <= write_data;
else if(address[2:0] == 3'b010)
mem[10]<= write_data;
else if(address[2:0] == 3'b011)
mem[11]<= write_data;
else if(address[2:0] == 3'b100)
mem[12] <= write_data;
else if(address[2:0] == 3'b101)
mem[13] <= write_data;
else if(address[2:0] == 3'b110)
mem[14] <= write_data;
else
mem[15] <= write_data;
end
end
else
begin
mem[0] <= mem[0];
mem[1] <= mem[1];
mem[2] <= mem[2];
mem[3] <= mem[3];
mem[4] <= mem[4];
mem[5] <= mem[5];
mem[6] <= mem[6];
mem[7] <= mem[7];
mem[8] <= mem[8];
mem[9] <= mem[9];
mem[10]<= mem[10];
mem[11]<= mem[11];
mem[12]<= mem[12];
mem[13]<= mem[13];
mem[14]<= mem[14];
mem[15]<= mem[15];
end
end
always@(posedge clr,posedge clk)
if(clr)
read_data <= 16'b0;
else if(read_en == 1'b1)
begin
if(address[3] == 1'b0)
begin
if(address[2:0] == 3'b000)
read_data <= mem[0];
else if(address[2:0] == 3'b001)
read_data <= mem[1];
else if(address[2:0] == 3'b010)
read_data <= mem[2];
else if(address[2:0] == 3'b011)
read_data <= mem[3];
else if(address[2:0] == 3'b100)
read_data <= mem[4];
else if(address[2:0] == 3'b101)
read_data <= mem[5];
else if(address[2:0] == 3'b110)
read_data <= mem[6];
else if(address[2:0] == 3'b111)
read_data <= mem[7];
end
else
begin
if(address[2:0] == 3'b000)
read_data <= mem[8];
else if(address[2:0] == 3'b001)
read_data <= mem[9];
else if(address[2:0] == 3'b010)
read_data <= mem[10];
else if(address[2:0] == 3'b011)
read_data <= mem[11];
else if(address[2:0] == 3'b100)
read_data <= mem[12];
else if(address[2:0] == 3'b101)
read_data <= mem[13];
else if(address[2:0] == 3'b110)
read_data <= mem[14];
else
read_data <= mem[15];
end
end
else
read_data <= read_data;
endmodule
没有memory-partition的代码:
module memory(
clr, //reset
clk, //clock
address, //address for read or write
read_en, //read enable
write_en, //写使能
read_data, //读使能
write_data //写的数据
);
input wire clr; //reset
input wire clk; //clock
input wire [3:0]address; //address for read or write
input wire read_en; //read_enable signal
input wire write_en; //write_enable signal
output reg [15:0]read_data; //the data you read from the memory
input wire [15:0]write_data; //write data to memory
reg [15:0]mem[15:0]; //get a 16*16's memory
always@(posedge clr,posedge clk)
begin
if(clr)
begin
mem[0] <= 16'b0;
mem[1] <= 16'b0;
mem[2] <= 16'b0;
mem[3] <= 16'b0;
mem[4] <= 16'b0;
mem[5] <= 16'b0;
mem[6] <= 16'b0;
mem[7] <= 16'b0;
mem[8] <= 16'b0;
mem[9] <= 16'b0;
mem[10] <= 16'b0;
mem[11] <= 16'b0;
mem[12] <= 16'b0;