原创 2014年12月22日 18:33:53


Adder 加法器

A logical circuitused to add two binary numbers.

Amplitude 幅度

In a pulse waveform,the height or maximum value of the pulse as measured from its low level .

Analog 模拟

Being continuous orhaving continous values.


A basic logicoperation in which a true (HIGH) output occurs only if all the input conditionsare true (HIGH).

Binary 二进制

Having two valuesor states ; describes a number system that has a base of two and utiliuzes 1and 0 as its digits.


A binary digit,which can be either a 1 or a 0.

Bit time 位时间

The interval oftime occupied by a single bit in a sequence of bits; the period of the block.

Clock 时钟信号

The baisc timingsignal in a digital system.

Data 数据

Information innumeric, alphabetic, or other form.

Digital 数字的

Related to digitsor discrete quantities; having a set of discrete values.

DIP 双排标准组合封装

Dual-in-linepackage. A type of IC package whose leads must pass through holes to the otherside of a PC board.

Frequency 频率

The number of pulsesin one second for a periodic digital waveform. The unit is hertz (Hz).

Gate 门电路

A logic circuitthat peforms a specified logic operation such as AND or OR.

Input 输入

The signal or linegoing into a circuit.

Integratedcircuit (IC) 集成电路

A type of circuitin which all of the components are integrated on a single chip ofsemiconductive material of extremely small size.

Invertor 反相器

A NOT circuit; acircuit that changes a HIGH to a LOW or vice versa.

Logic 逻辑

In digitalelectronics, the decision-making capability of gate circuits, in which a HIGHrepresents a true statement and a LOW represents a false one.


A basic logicoperation that peforms inversions.


A basic operationin which a true (HIGH) output occurs when one or more of the input conditionsare true(HIGH).

Output 输出

The signal or linecoming out of a circuit.

Parallel 并行

In digital systems,data occuring simultaneously on several lines; the transfer or processing ofseveral bits simultaneously.

Period 周期

The time requiredfor a periodic waveform to repeat itself.

Pulse 脉冲

A sudden changefrom one level to another, followed after a time, called the pulse width, by asudden change back to the original level.

Serial 串行

Having one elementfollowing another, as in a serial transfer of bits; occuring in sequence afterthan simultaneously.

SMT 表面封装技术

Surface-mounttechnology. A category of integrated circuit package having leads that areconnected on the surface of the PC board.


The technology or processof systematically identifying, isolating, and correcting a fault in a circuitor system.




Chapter 2

Alphanumeric 字母数字表

Consisting of numbers, letters, and other characters.

ASCII 美国信息交换标准码

American standard code for information interchange; themost widely used alphanumeric code.

BCD 二-十进位

Binary coded decimal; a digital code in which each of thedecimal digits, 0 through 9, is represented by group of four bits.

Byte 字节

A group of eight bits.

Carry 进位

The digits generated when the sum of two binary digitsexceeds 1.

Complement 反码

The inverse or opposite of a number.

Decimal 十进制

Describes a number system with a base of ten.

Digit 数字

A symbol used toexpress a quantity.

Exponent 指数,幂

The part of a floating-point number that represents thenumber of places that the decimal point (or binary point) is to be moved.

Floating-point number 浮点数

A number representation based on scientific notation inwhich the number consists of an exponent and a mantissa.

Gray code 格雷码

An unweigthed digital code characterized by a single bitchange between adjacent code number in a sequence.

Hexadecimal 十六进制

Describes a number system with a base of 16.

Integer 整数

A whole number.

Least significant bit (LSB) 最低有效位

Generally, the right-most bit in a binary whole number orcode.

Mantissa 尾数

The magnitude of a floating-point number.

Most significant bit (MSB) 最高有效位

The left-most bit in a binary whole number or code.

Octal 八进制

Describes a number system with a base of 8.

Overflow 溢出

The condition that occurs when the number of bits in asum exceeds the number of bits in each of the numbers added.

Parity 奇偶校验

In relation to binary codes, the condition of evenness oroddness of the number of 1s in a code group.

Sign bit 符号位

The left-most bit of a binary number the designateswhether the number is positive (0) or negative(1) .

Weight 权值

The value of a dight in a number based on its position inthe nubmer.





AND gate 与门

A logic gate thatproduces a HIGH ouput only when all of the inputs are HIGH.

ANSI 美国国家标准协会

American NationalStandard Institute.

Booleanaddition 布尔加法

In Boolean algebra,the OR operation.

Booleanalgebra 布尔代数

The mathematics oflogic circuits.

Booleanmultilplication 布尔乘法

In Boolean algebra,the AND operation.

CMOS 互补性金属氧化半导体

Complementarymetal-oxide semiconductor; a class of integrated logic circuit that isimplemented with a type of field-effect transistor.


Emitter-coupledlogic; a class of integrated logic circuit that is implemented with nonsaturatingbipolar junction transistors.

Enable 使能

To activate or putinto an operational mode; an input on a logic circuit that enables itsoperation.

Exclusive-NOR(XNOR)gate 同或门

A logic gate thatproduces a LOW output only when its two inputs are at opposite levels.

Exclusive-OR(XOR)gate 异或门

A logic gate thatproduces a HIGH output only when its two inputs are at opposite levels.

Fan-out 扇出

The number ofequivalent gate inputs of the same family series that a logic gate can drive.

IEEE 电子电气工程师协会

Institute ofElectrical and Electronic Engineers.

Inversion 反转

The conversion of aHIGH(1) level to a LOW(0) level or vice versa.

NAND gate 与非门

A logic gate whichproduces a LOW output only when all the inputs are HIGH.


An equivalent NORgate operation in which the HIGH is the active output when all inputs are LOW.

Negative-OR 非或

An equivalent NANDgate operation in which the HIGH is the active input when one or more of theinputs are LOW.

NOR gate 或非门

A logic gate inwhich the output is LOW when one or more of the inputs are HIGH.

OR gate 或门

A logic gate thatproduces a HIGH output when one or more inputs are HIGH.

Powerdissipation 功耗

The product of thedc supply voltage and the dc supply current in an electronic circuit; the amountof power required by a circuit.

Prapagationdelay time 传播延迟时间

The time intervalbetween the occurrence of an input transition and the occurrence of thecorresponding output transition in a logic circuit.

Speed-powerproduct 速度-功率乘积

A performanceparameter that is the product of the propagation delay time and the powerdissipation in a logic circuit.

Truth table 真值表

A table showing theinputs and corresponding output(s) of a logic circuit.

TTL 电晶体-电晶体逻辑电路

Transistor-tarnsistorlogic; a class of integrated logic circuit that uses bipolar junctiontransistors.

Unit load 单位负载

A measure offan-out. One gate input represents one unit load th the output of a gate withinthe same IC family.




Adjacency 邻接

Characteristic ofcells in a Karnaugh map in which there is a single-variable change from onecell to another cell next to it on any of its four sides.

Associativelaw 结合律

In addition(ORing)and multiplication(ANDing) of three or more variables, the order in which thevariables are grounded makes no difference.

Booleanexpression 布尔表达式

An arrangment ofvariables anf logical operators used to express the operation of a logiccircuit.

Cell 单元

An area on aKarnaugh map that represents a unique combiantion of variables in product form.

Commutativelaw 交换律

In addition (ORing)and multiplication (ANDing) of two variables, the order in which the variablesare ORed or ANDed makes no difference.

Distributivelaw 分配律

ORing severalvariables and then ANDing the result with a single variable is equivalent toANDing the single variable with each of several variables and then ORing theproducts.


All of thevariables in a Boolean expression.

“Don’t care”任意值

A combination ofinput literals that cannot occur and can be used as a 1 or a 0 on a Karnaughtmap.

Karnaughtmap 卡诺图

An arrangment ofcells representing the combination of literals in a Boolean expression and usedfor a systematic simplification of the expression.

Literal 实字

A variable or thecomplement of a variable.c

Product-of-sum(POS) 和之积

A form of Booleanexpression that is basically the ANDing of ORed terms.

Product term乘积项

The Boolean productof two or more literals equivalent to an AND operation.


A form of Booleanexpression that is basically the ORing if ANDed terms.

Sum term 和项

The boolean sum oftwo or more literals equivalent to an OR operation.

Variable 变量

A symbol used torepresent a logical quantity that can have a value of 1 or 0, usuallydesignated by an italic letter.




Dual symbols双分符号

The negative-AND isthe dual symbol for the NOR gate, and the negative-OR is the dual symbol forthe NAND gate.

Node 节点

A common connectionpoint in a circuit in which a gate output is connected to one or more gateinputs.

Signaltracing 信号故障追踪

A troubleshootingtechnique in which waveforms are observed in a step-by-step manner beginging atthe input and working toward the output or vice versa. At each point theobserved waeform is compared with the correct signal for that point.

Universalgate 通用门电路

Either a NAND gateor a NOR gate. The term universal refers to the property of a gate that permitsany logic function to be implemented by that gate or by a combination if gatesof that kind.




Carrygeneration 进位产生

The process ofproducing an output carry in a full-adder when both input bits are 1s.


The process ofrippling an input carry to become an output carry in a full-adder when eitherof both of the input bits are 1s and the input carry is a 1.


Connecting theoutput of one device to the input of a similar device, allowing one device todrive another in order to expand the operational capability.


A digital devicethat converts one type of coded information into another coded form.


A circuit thatselects data from several inputs one at a time in a sequence and place them onthe output; also called a multiplexer.


A digital circuitthat converts coded information into a familiar of noncoded form.


A circuit thatswitches digital data from several input lines onto a single output line in aspecified time sequence.


A notational systemfor logic symbols that specifies input and output relationships, thus fullydefining a given function; an integral part of ANSI/IEEE Std. 91-1984.


A digital circuitthat conv3erts information to a coded form.

Even parity偶校验

The condition ofhaving an even number of 1s in every group of bits.


A digital circuitthat adds two bits and an input carry to produce a sum and an output carry.

Glitch. 干扰脉冲

A voltage orcurrent spie of short duration, usually unintentionally produced and unwanted.


A digital circuitthat adds two bits and produces a sum and an output carry.? Ir cannot handleinput carries.


A method of binaryaddition whereby carries from preceding adder stages are anticipated, thuselimination carry propagation delays.


A circuit thatswitches digital data from several input lines onto a single output line in aspecified time sequence.


A group of fourbits.

Odd parity奇校验

The condition ofhaving an odd number of 1s in every group of bits.

Parity bit校验位

A bit attached toeach group of information bits to make the total number of 1s odd or even forevery group of bits.


An encoder in whichonly the highest value input digit is encoded and any other active input is ignored.


A resistor with oneend connected to the dc supply voltage used to keep a given point in a circuitHIGH when in the inactive state.


A method of binaryaddition in which the output carry from each adder becomes the input carry ofthe next higher-order adder.


A process of usinga pulse to sample the occurrence of an evernt at a specified time in relationto the event.


The process ofblanking out leading or trailing zeros in a digital display.





Advanced BooleanExpression Language. A software compiler language for PLD programming; A typeof hardware description language(HDL).


The internalfunctional arrangement of the elements that give a device its particularoperating characteristics.


In a PLD, a matrixformed by rows of product-term lines and columns of input lines with aprogrammable cell at each junction.


A circuit thatprevents loading of an input or output.


A fused corss pointof a row and column in a PLD.


Software thattranslates from high-level language that uses words of symbols, such as ABEL orCUPL, into low-level machine language(1s and 0s)


The information forma computer that documents the final design after the input file has beenprocessed.


Electricallyerasable COMS(EECMOS). The circuit technology used for the reprogrammable cellsin a GAL.


The programmableoutput logic macrocells.


Generic arraylogic. A PLD with a reprogrammable AND array, a fixed OR array, andprogrammable output logic macrocells.

Input file输入文件

The informationentered in computer that describes a logic design using a PLD programminglanguage such as ABEL or CUPL.


A terminal ofdevice that can be used as either an input of as an output.

JEDEC file电子工程设计发展联合会议文件

A Joint ElectronicDevice Engineering Council standard software file generated from the compilersoftware that is used by a programming device to implement a logic design in aPLD; also called a fuse map of cell map.


Output logicmacrocell. The programmable output logic in a GAL.


Programmable arraylogic. A PLD with a programmable AND array and a fixed or array.


Programmable logicarray. A PLD with programmable AND and OR arrays.


An instrument thatprograms a PLD using a JEDEC file downloaded from a computer running hardwaredescription language software.


Programmableread-only semiconductor memory. A PLD with a fixed AND array and programmableOR array; used as a memory device and normally not as a logic circuit device.


Computer programs;programs that instruct a computer what to do in order to carry out a given setof tasks.


The softwareprocess of converting a circuit description to a standard JEDEC file for PLDprogramming.

Tristateoutput buffer三态输出缓冲器

A logic circuithaving three output states: HIGH, LOW, and high impedance(open).

ZIF socketZIP插座

Zero insertionforce socket. A type of socket used in most programmers that accepts a PLDpackage.




Astable 非稳态的

Having no stablestate. An astable multivibrator oscillates between two qusaistable states.


Having no fixedtime relationship.


Having two stablestates. Flip-flops and latches are bistable multivibrators.


An asynchronousinput used to reset a flip-flop (make the Q output 0).

D flip-flopD触发器

A type of bistablemultivibrator in which the output assumes the state of the D input on thetriggering edge of a clock pulse


A type of flip-flopin which the data are entered and appear on the output on the same clock edge.


The output voltageor a portion of it that is connected back to the input of circuit.

Hold time保持时间

The time intervalrequired for the control levels to remain on the inputs to a flip-flop afterthe triggering edge of the clock in order to reliably activate the device.


A characteristic ofthreshold-triggered circuit, such as the Schmitt trigger, where the deviceturns on and off at different input levels.

J-Kflip-flop J-k触发器

A type of flip-flopthat can operate in the SET, RESET, no-change, and toggle modes.


A bistable digitalcircuit used for storing a bit.


A type of flip-flopin which the input data are entered into the device on the leading edges ofclock pulses and appear at the output on trailing edges. Master-slave flip-flophave, for the most part, been replaced by edge-triggered types.


Having only onestable state. A monostable multivibrator, commonly called a one-shot, producesa single pulse in response to a triggering input.


A monostablemultivibrator.


An asynchronousinput used to set a flip-flop(make the Q output 1)


The state of aflip-flop or latch when the output is 0; the action of producing a RESET state.


The state offlip-flop of latch when the output is 1; the action of producing a SET state.

Set-up time设置时间

A SET-RESETflip-flop.


A circuit that canbe used as a one-shot or as an oscillator.


The action of aflip-flop when it changes state on each clock pulse.





A type of counterin which each stage is clocked from the output of the preceding stage.


To connect“end-to-end” as when several counters are connected from the terminal countoutput of one counter to the enable input of the next counter.


Characterized byten states or values.


A digital counterhaving ten states.


To undergotransition (as in a counter) from the final or terminal state back to theinitial state.


An asynchronouscounter.


A digital circuitwhose logic states follow on specified time sequence.


A graphic depictionof a sequence of states or values.


A logic systemexhibiting a sequence of states conditioned by internal logic and externalinputs; any sequential circuit exhibiting a specified sequence of states.


A type of counterin which each stage is clocked b the same pulse.


The final state ina counter’s sequence.




A sequence thatdoes not include all of the possible states of a counter.


A counter that canprogress in either direction through a certain sequence.





Having twodirections. In a bidirectional shift register, the stored data can be shiftedright or left.

Johnsoncounter Johnson计数器

A type of registerin which a specific prestored pattern of 1s and 0s is shifted through thestates, creating a unique sequence of bit patterns.


To enter data intoa shift register.

Ring counter环形计数器

A register in whicha certain pattern of 1s and 0s continuously recirculated.


To move binary datafrom state to stage within a shift register of other storage device or to movebinary data into or out of the device.


One storage elementin a register.

Universalshift register通用移位寄存器

A register that has both serial and parallel input andoutput capability.





Global cell全局单元

A programmable cellin a PLD array that affects all of the OLMCs when programmed.

Local cell本地单元

A programmable cellin a PLD array that affects individual OLMCs when programmed.

Registered 寄存器模式

A PLD outputconfiguration where the output comes from a flip-flop.




Access time存取时间

The time from theapplication of a valid memory address to the appearance of valid output data.


The location of agiven storage cell or group of cells in a memory.

BEDO DRAM脉冲扩展数据输出动态随机访问存储器

Burst extended dataoutput dynamic random-access memory.

Bus 总线

Asset ofinterconnections that interface one or more devices based on a standardizedspecification.


A group of eightbits.

Cache memory高速缓冲存储器

A relatively small,high-speed memory that stores the most recently used instructions or data fromthe larger but slower main memory.


The total number ofdata units(bits, nibbles, bytes, words) that a memory can store.


Charge-coupleddevice; a type of semiconductor memory that stores data in te form of chargepackets and is serially accessed.


CD-Recordable; anoptical disk storage device on which a data can be stored once.


An optical diskstorage device on which data is prestored.


CD-Rewritable; anoptical disk storage on which data can be written and over-written many times.


A single storageelement in a memory.


Digital audio tape;a type of magnetic tape format.


Dual in-line memorymodule.


Digital lineartape; a type of magnetic tape format.


Dynamicrandom-access memory; a type of semiconductor memory that uses capacitors asthe storage elements and is a volatile, read/write memory.


Digital versatiledisk-ROM; also known as digital video disk-ROM; a type of optical storagedevice on which data is restored with a much higher capacity than a CD-ROM.


A type ofsemiconductor memory having capacitive storage cells that lose stored data overa period of time and, therefore, must be refreshed.

EDO DRAM扩展数据输出动态随机存取记忆体

Extended dataoutput dynamic random-access memory.


Electricallyerasable programmable read-only memory; a type of semiconductor memory device.


Erasableprogrammable read-only memory; a type of semiconductor memory device thattypically uses ultraviolet light to erase data.




First in –first outmemory.

Flash memory闪存

A nonvolatileread/write random-access semiconductor memory in which data is stored as chargeon the floating gate of a certain type of FET.

Floppy disk软盘

A magnetic storagedevice; a flexible disk with a diameter of 3.5 inches and a storage capacity of1.44 Mbytes encased in a rigid plastic housing.

FPM DRAM快页模式的动态随机存储器

Fast page modedynamic random-access memory.

Hard disk硬盘

A magnetic storagedevice; typically, a stack of two or more rigid disks enclosed in a sealedhousing.

Jazcartridge JAZ磁带

A magnetic storagedevice; hard disks encased in a rigid plastic cartridge with storage capacitiesof 1 Gbyte or 2 Gbytes.


The time it takesfor the desired sector to spin under the head once the head is positioned overthe desired track of a magnetic hard disk.


Last in-first outmemory; a memory stack.


A storage devicethat uses both electromagnetism and a laser beam to read and write data.

Memory array存储器阵列

An array of memorycells arranged in rows and columns.


Metal-oxidesemiconductor field-effect transistor.

Nibble 半字节

A group of fourbits.


A term thatdescribes a memory that can retain stored data when the power is removed.

Pipeline 流水线技术

As applied tomemories, an implementation that allows a read or write operation to beinitiated before the previous operation is completed.


Programmableread-only memory; a type of semiconductor memory.

QIC 1/4英寸磁带

Quarter-inchcassette; a type of magnetic tape.


Random-accessmemory; a volatile read/write semiconductor memory.


The process ofretrieving data from a memory.


To renew thecontents of a dynamic memory by recharging the capacitor storage cells.


Read-only memory; anonvolatile random-access semiconductor memory.

Seek time寻道时间

The time for theread/write head in a hard drive to position itself over the desired track for aread operation.


Synchronous dynamicrandom-access memory.


Single in-linememory module.


Staticrandom-access memory; atype of volatile read/write semiconductor memory.


A volatilesemiconductor memory that uses flip-flops as the storage cells and is capableof retaining data without refreshing.

UV PROM紫外线可擦写可编程ROM

Ultravioleterasable programmable ROM.


A term thatdescribes a memory that loses its stored data when the power is removed.


A complete unit ofbinary data.


The number of wordthat a memory can store.

Word length字长

The number of bitsin a word.


Write once-readmemory; a type of optical storage device.


The process ofstoring data in a memory.

Zip disk Zip磁盘

A type of magneticstorage; a flexible disk with a capacity of 100 Mbytes housed in a rigidplastic cartridge about the size of a floppy.





A receiving deviceon a bus.

Analog-to-digitalconverter (ADC)模数转换器

A device used toconvert an analog signal to digital form.


A set ofinterconnections that interface one or more devices based on a standardizedspecification.


The process thatprevents two sources from using a bus at the same time.

Bus contention总线竞争

An adversecondition that could occur if two or more devices try to communicate at thesame time on a bus.


An instrument thatcan specify each of the other instruments on the bus as either a talker or alistener for the purpose of data transfer.


Data communicationsequipment.

Digital-to-analogconverter (DAC)数模转换器

A device used toconvert a digital input to an analog signal.


Data terminalequipment.

Flash ADC

A simultaneousanalog-to-digital converter.


General-purposeinterface bus based on the IEEE 488 standard.


The process ofsignal interchange by which two digital devices or systems jointly establishcommunication.


The high-impedancestate of a tristate circuit in which the output is effectively disconnectedfrom the rest of the circuit.

IEEE 488 busIEEE 488总线

Same as the GPIB. Astandard parallel bus used widely for test and measurement interfacing.

IEEE 1394bus IEEE 1394总线

A serial bus forhigh-speed data transfer; also known as FireWire.


The process ofmaking two or more electronic devices or systems operationally compatible witheach other so that they can function properly together.

ISA bus ISA总线

Industry standardarchitecture bus; an internal parallel bus standard.


An instrumentcapable of receiving data on a GPIB.

Local bus本地总线

An internal busthat connects the microprocessor to the cache memory, the main memory, thecoprocessor, and the PCI bus controller.


Amodulator/demodulator for interfacing digital devices to analog transmissionsystems such as telephone lines.


The characteristicof a DAC defined by the absence of any incorrect step reversals; one type ofdigital-to-anolog linearity.

PCI bus PCI总线

Peripheral controlinterconnect bus; an internal parallel bus standard.


A device orinstrument that provides communication with a computer or provides auxiliaryservices or functions for a computer.


The physicalinterface between a computer and a peripheral.


Small computersystem interface; an external parallel bus standard.


A sending device ona bus.

Talker 发话器

An instrumentcapable of transmitting data on a GPIB.

Tristate 三态

A type of output inlogic circuits that exhibits three states; HIGH, LOW, and High-Z.


Universal serialbus; an external serial bus standard.





A general-purposeregister used for arithmetic and logic operations.


A unique memorylocation containing one byte.

Address bus地址总线

Generally, aone-way group of conductors from the microprocessor to memory, containing theaddress information.


Arithmetic logicunit; the portion of the CPU that interfaces with the system buses and fetchesinstructions, reads operands, and writes results.


A program thattranslates high-level program statements, such as BASIC, Pascal, or Fortran,into machine language.


Joined together.

Control bus控制总线

A one-way set ofconductors that connects the CPU to other parts of the computer to coordinateits operations and to communicated with external devices.

Control unit控制单元

The portion withinthe microprocessor that provides the timing an control signals for getting datainto and out of the microprocessor and for synchronizing the execution ofinstructions.


A microprocessordesigned with a limited instruction set optimized to perform arithmeticoperations very quickly; it generally works I conjunction with ageneral-purpose microprocessor.

CPU 中央处理单元

Central processingunit(also called the MPU); the main part of a computer responsible for controland processing of data.

Data bus数据总线

A bidirectional setof conductive paths on which data or instruction codes are transferred into themicroprocessor or on which the result of an operation or computation is sentout from the microprocessor.


A code within DOSthat allows various operations on files. It includes a primitive assembler.


Direct memoryaccess; a method to directly interface a peripheral device to memory witherusing the CPU for control.


Execution unit; theportion of a CPU that executes instructions; it contains the arithmetic logicunit (ALU), the general registers, and the flags.


A bit thatindicates the result of an arithmetic or logic operation or is used to alter anoperation.


The circuitry andphysical components of a computer system (as opposed to the directions calledsoftware).


The process ofcombining certain independent instructions so that they can be executedsimultaneously by two separate execution units.


A signal orinstruction that caused the current process to be temporarily stopped while aservice routine is run.

I/O port输入输出端口

Input/output port;the interface between an tinernal bus and a peripheral.


Instructionpointer; a special register within the CPU that holds the offset address of thenext instruction to be executed.

Machine code机器码

The basic binaryinstructions understood by the processor.


A method ofaddressing ports by assigning addresses within the computer memory addressspace to the por. The CPU views the I/O ports as memory locations.


A specializedmicroprocessor designed for control functions.


A digitalintegrated circuit device that can be programmed with a series of instructionsot perform specified function on data.


An English-likeinstruction that is converted by an assembler into a machine code for use by aprocessor.


An operating systemenvironment in which the computer seems to run multiple programs or taskssimultaneously.


The code for aninstruction; a mnemonic.


A variable, aregister, a memory location, or a value used in an assembly language program aspart of the instruction.


Programmableinterrupt controller; handles the interrupts on a priority basis.


The contents of aregister (or registers) that contain an address.


The process ofchecking a series of peripheral devices to determine if any require servicefrom the CPU.


A physicalinterface on a computer through which data are passed to or from peripherals.


Programmableperipheral interface; a special IC used to implement I/O ports.


The process ofexecuting instruction at the same time as other instructions are “fetched,”eliminating idle time; also called pipelining.


A group ofinstructions designed to solve a specific problem.


An instruction tothe assembler (as opposed to a processor).


A high-speed memorythat stores instructions or data.

Real mode实模式

Operation of anIntel processor in a manner to emulate the 8086’s 1Mbyte of memory.


A set of temporarystorage locations within the microprocessor for keeping data and addresses thatneed to be accessed quickly by the program.


A program that canbe moved anywhere within the memory space without changing the basic code.


A 64k block ofmemory.


Programs andinstructions.


An instruction thatinvokes an interrupt service routine.


A contiguoussequence of bytes or words.


A series ofinstructions that can be assemble together and sued repeatedly by a program butprogrammed only once.


The average speedwith which a program is executed.





A type oftransistor technology in which a transistor is constructed with two pnjunctions.


Complementarymetal-oxide semiconductor; a type of integrated logic circuit that uses n- and p-channelMOSFETs (metal-oxide semiconductor field-effect transistors).


The action of alogic circuit in which it accepts current into its output from a load.


The action of alogic circuit in which it sends current into its output to a load.


One of the threeterminals of a MOSFET.


Electricallyerasable CMOS; the IC technology use in programmable logic devices (PLDs).


A logic circuitthat performs a specified logic operation such and AND or OR; one of the threeterminals of a MOSFET.


The ability of alogic circuit to reject unwanted signal (noise).

Noise margin噪声边界

The differencebetween the maximum LOW output of a gate and the maximum acceptable LOW input ofan equivalent gate; also, the difference between the minimum HIGH output of agate and the minimum HIGH input of an equivalent gate. Noise margin issometimes expressed as a percentage of the dc supply voltage.


A type of outputfor a TTL circuit in which the collector of the output transistor is leftinternally disconnected and is available for connection to an external loadthat requires relatively high current or voltage.

Propagationdelay time传播延迟时间

The time intervalbetween the occurrence of an input transition and the occurrence of thecorresponding output transition in a logic circuit.


A resistor with oneend connected to the dc supply voltage used to keep a given point in a logiccircuit HIGH when in the inactive state.


One of the threeterminals of a MOSFET.


Transistor-transistorlogic. A type of integrated circuit that uses bipolar junction transistors.

Unit load单位负载

A measure offan-out. One gate input represents a unit load to a driving gate. 


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