数据传输指令 它们在存贮器和寄存器、寄存器和输入输出端口之间传送数据.
1. 通用数据传送指令.
MOV 传送字或字节.
MOVSX 先符号扩展,再传送.
MOVZX 先零扩展,再传送.
MOVSX reg16,r/m8 ; o16 0F BE /r [386] MOVSX reg32,r/m8 ; o32 0F BE /r [386] MOVSX reg32,r/m16 ; o32 0F BF /r [386] MOVZX reg16,r/m8 ; o16 0F B6 /r [386] MOVZX reg32,r/m8 ; o32 0F B6 /r [386] MOVZX reg32,r/m16 ; o32 0F B7 /r [386]
PUSH 把字压入堆栈.
POP 把字弹出堆栈.
PUSHA 把AX,CX,DX,BX,SP,BP,SI,DI依次压入堆栈.
POPA 把DI,SI,BP,SP,BX,DX,CX,AX依次弹出堆栈.
PUSHAD 把EAX,ECX,EDX,EBX,ESP,EBP,ESI,EDI依次压入堆栈.
POPAD 把EDI,ESI,EBP,ESP,EBX,EDX,ECX,EAX依次弹出堆栈.
BSWAP 交换32位寄存器里字节的顺序
XCHG 交换字或字节.( 至少有一个操作数为寄存器,段寄存器不可作为操作数)
CMPXCHG 比较并交换操作数.( 第二个操作数必须为累加器AL/AX/EAX )
XADD 先交换再累加.( 结果在第一个操作数里 )
XLAT 字节查表转换.
── BX 指向一张 256 字节的表的起点, AL 为表的索引值 (0-255,即
0-FFH); 返回 AL 为查表结果. ( [BX+AL]->AL )
2. 输入输出端口传送指令.
IN I/O端口输入. ( 语法: IN 累加器, {端口号│DX} )
OUT I/O端口输出. ( 语法: OUT {端口号│DX},累加器 )
输入输出端口由立即方式指定时, 其范围是 0-255; 由寄存器 DX 指定时,
其范围是 0-65535.
3. 目的地址传送指令.
LEA 装入有效地址.
例: LEA DX,string ;把偏移地址存到DX.
LDS 传送目标指针,把指针内容装入DS.
例: LDS SI,string ;把段地址:偏移地址存到DS:SI.
LES 传送目标指针,把指针内容装入ES.
例: LES DI,string ;把段地址:偏移地址存到ES:DI.
LFS 传送目标指针,把指针内容装入FS.
例: LFS DI,string ;把段地址:偏移地址存到FS:DI.
LGS 传送目标指针,把指针内容装入GS.
例: LGS DI,string ;把段地址:偏移地址存到GS:DI.
LSS 传送目标指针,把指针内容装入SS.
例: LSS DI,string ;把段地址:偏移地址存到SS:DI.
4. 标志传送指令.
LAHF 标志寄存器传送,把标志装入AH.
SAHF 标志寄存器传送,把AH内容装入标志寄存器.
PUSHF 标志入栈.
POPF 标志出栈.
PUSHD 32位标志入栈.
POPD 32位标志出栈.
二、算术运算指令
───────────────────────────────────────
ADD 加法.
ADC 带进位加法.
INC 加 1.
AAA 加法的ASCII码调整.
DAA 加法的十进制调整.
SUB 减法.
SBB 带借位减法.
DEC 减 1.
NEC 求反(以 0 减之).
CMP 比较.(两操作数作减法,仅修改标志位,不回送结果).
AAS 减法的ASCII码调整.
DAS 减法的十进制调整.
MUL 无符号乘法.
IMUL 整数乘法.
以上两条,结果回送AH和AL(字节运算),或DX和AX(字运算),
AAM 乘法的ASCII码调整.
DIV 无符号除法.
IDIV 整数除法.
以上两条,结果回送:
商回送AL,余数回送AH, (字节运算);
或 商回送AX,余数回送DX, (字运算).
AAD 除法的ASCII码调整.
CBW 字节转换为字. (把AL中字节的符号扩展到AH中去)
CWD 字转换为双字. (把AX中的字的符号扩展到DX中去)
CWDE 字转换为双字. (把AX中的字符号扩展到EAX中去)
CDQ 双字扩展. (把EAX中的字的符号扩展到EDX中去)
三、逻辑运算指令
───────────────────────────────────────
AND 与运算.
OR 或运算.
XOR 异或运算.
NOT 取反.
TEST 测试.(两操作数作与运算,仅修改标志位,不回送结果).
SHL 逻辑左移.
SAL 算术左移.(=SHL)
SHR 逻辑右移.
SAR 算术右移.(=SHR)
ROL 循环左移.
ROR 循环右移.
RCL 通过进位的循环左移.
RCR 通过进位的循环右移.
以上八种移位指令,其移位次数可达255次.
移位一次时, 可直接用操作码. 如 SHL AX,1.
移位>1次时, 则由寄存器CL给出移位次数.
如 MOV CL,04
SHL AX,CL
四、串指令
───────────────────────────────────────
DS:SI 源串段寄存器 :源串变址.
ES:DI 目标串段寄存器:目标串变址.
CX 重复次数计数器.
AL/AX 扫描值.
D标志 0表示重复操作中SI和DI应自动增量; 1表示应自动减量.
Z标志 用来控制扫描或比较操作的结束.
MOVS 串传送.
( MOVSB 传送字符. MOVSW 传送字. MOVSD 传送双字. )
CMPS 串比较.
( CMPSB 比较字符. CMPSW 比较字. )
SCAS 串扫描.
把AL或AX的内容与目标串作比较,比较结果反映在标志位.
LODS 装入串.
把源串中的元素(字或字节)逐一装入AL或AX中.
( LODSB 传送字符. LODSW 传送字. LODSD 传送双字. )
STOS 保存串.
是LODS的逆过程.
REP 当CX/ECX<>0时重复.
REPE/REPZ 当ZF=1或比较结果相等,且CX/ECX<>0时重复.
REPNE/REPNZ 当ZF=0或比较结果不相等,且CX/ECX<>0时重复.
REPC 当CF=1且CX/ECX<>0时重复.
REPNC 当CF=0且CX/ECX<>0时重复.
五、程序转移指令
───────────────────────────────────────
1>无条件转移指令 (长转移)
JMP 无条件转移指令
CALL 过程调用
RET/RETF过程返回.
2>条件转移指令 (短转移,-128到+127的距离内)
( 当且仅当(SF XOR OF)=1时,OP1
JA/JNBE 不小于或不等于时转移.
JAE/JNB 大于或等于转移.
JB/JNAE 小于转移.
JBE/JNA 小于或等于转移.
以上四条,测试无符号整数运算的结果(标志C和Z).
JG/JNLE 大于转移.
JGE/JNL 大于或等于转移.
JL/JNGE 小于转移.
JLE/JNG 小于或等于转移.
以上四条,测试带符号整数运算的结果(标志S,O和Z).
JE/JZ 等于转移.
JNE/JNZ 不等于时转移.
JC 有进位时转移.
JNC 无进位时转移.
JNO 不溢出时转移.
JNP/JPO 奇偶性为奇数时转移.
JNS 符号位为 "0" 时转移.
JO 溢出转移.
JP/JPE 奇偶性为偶数时转移.
JS 符号位为 "1" 时转移.
3>循环控制指令(短转移)
LOOP CX不为零时循环.
LOOPE/LOOPZ CX不为零且标志Z=1时循环.
LOOPNE/LOOPNZ CX不为零且标志Z=0时循环.
JCXZ CX为零时转移.
JECXZ ECX为零时转移.
4>中断指令
INT 中断指令
INTO 溢出中断
IRET 中断返回
5>处理器控制指令
HLT 处理器暂停, 直到出现中断或复位信号才继续.
WA
ESC 转换到外处理器.
LOCK 封锁总线.
NOP 空操作.
STC 置进位标志位.
CLC 清进位标志位.
CMC 进位标志取反.
STD 置方向标志位.
CLD 清方向标志位.
STI 置中断允许位.
CLI 清中断允许位.
六、伪指令
───────────────────────────────────────
DW 定义字(2字节).
PROC 定义过程.
ENDP 过程结束.
SEGMENT 定义段.
ASSUME 建立段寄存器寻址.
ENDS 段结束.
END 程序结束.
七、寄存器
1. Register usage in 32 bit Windows
Function parameters are passed on the stack according to the calling conventions listed on
page 13. Parameters of 32 bits size or less use one DWORD of stack space. Parameters
bigger than 32 bits are stored in little-endian form, i.e. with the least significant DWORD at the
lowest address, and DWORD aligned.
Function return values are passed in registers in most cases. 8-bit integers are returned in
AL, 16-bit integers in AX, 32-bit integers, pointers, and Booleans in EAX, 64-bit integers in
EDX:EAX, and floating-point values in ST(0). Structures and class objects not exceeding
64 bits size are returned in the same way as integers, even if the structure contains floating
point values. Structures and class objects bigger than 64 bits are returned through a pointer
passed to the function as the first parameter and returned in EAX. Compilers that don\'t
support 64-bit integers may return structures bigger than 32 bits through a pointer. The
Borland compiler also returns structures through a pointer if the size is not a power of 2.
Registers EAX, ECX and EDX may be changed by a procedure. All other general-purpose
registers (EBX, ESI, EDI, EBP) must be saved and restored if they are used. The value of
ESP must be divisible by 4 at all times, so don\'t push 16-bit data on the stack. Segment
registers cannot be changed, not even temporarily. CS, DS, ES, and SS all point to the flat
segment group. FS is used for a thread environment block. GS is unused, but reserved.
Flags may be changed by a procedure with the following restrictions: The direction flag is 0
by default. The direction flag may be set temporarily, but must be cleared before any call or
return. The interrupt flag cannot be cleared. The floating-point register stack is empty at the
entry of a procedure and must be empty at return, except for ST(0) if it is used for return
value. MMX registers may be changed by the procedure and if so cleared by EMMS before
returning and before calling any other procedure that may use floating-point registers. All
XMM registers can be modified by procedures. Rules for passing parameters and return
values in XMM registers are described in Intel\'s application note AP 589 "Software
Conventions for Streaming SIMD Extensions". A procedure can rely on EBX, ESI, EDI, EBP
and all segment registers being unchanged across a call to another procedure.
2. Register usage in Linux
The rules for register usage in Linux appear to be almost the same as for 32-bit windows.
Registers EAX, ECX, and EDX may be changed by a procedure. All other general-purpose
registers must be saved. There appears to be no rule for the direction flag. Function return
values are transferred in the same way as under Windows. Calling conventions are the
same, except for the fact that no underscore is prefixed to public names. I have no
information about the use of FS and GS in Linux. It is not difficult to make an assembly
function that works under both Windows and Linux, if only you take these minor differences
into account.
八、位操作指令，处理器控制指令
1.位操作指令，8086新增的一组指令，包括位测试，位扫描。BT,BTC,BTR,BTS,BSF,BSR
1.1 BT(Bit Test)，位测试指令，指令格式:
BTOPRD1,OPRD2,规则：操作作OPRD1可以是16位或32位的通用寄存器或者存储单元。操作数OPRD2必须是8位立即数或者是与OPRD1操作数长度相等的通用寄存器。如果用OPRD2除以OPRD1，假设商存放在Divd中，余数存放在Mod中，那么对OPRD1操作数要进行测试的位号就是Mod,它的主要功能就是把要测试位的值送往CF，看几个简单的例子：
1.2 BTC(Bit Test And Complement)，测试并取反用法和规则与BT是一样，但在功能有些不同，它不但将要测试位的值送往CF，并且还将该位取反。
1.3 BTR(Bit Test And Reset)，测试并复位，用法和规则与BT是一样，但在功能有些不同，它不但将要测试位的值送往CF，并且还将该位复位(即清0)。
1.4 BTS(Bit Test And Set)，测试并置位，用法和规则与BT是一样，但在功能有些不同，它不但将要测试位的值送往CF，并且还将该位置位(即置1)。
1.5BSF(Bit Scan Forward)，顺向位扫描，指令格式:BSFOPRD1,OPRD2，功能：将从右向左(从最低位到最高位）对OPRD2操作数进行扫描，并将第一个为1的位号送给操作数OPRD1。操作数OPRD1，OPRD2可以是16位或32位通用寄存器或者存储单元，但OPRD1和OPRD2操作数的长度必须相等。
1.6BSR(Bit Scan Reverse)，逆向位扫描，指令格式:BSROPRD1,OPRD2，功能：将从左向右(从最高位到最低位）对OPRD2操作数进行扫描，并将第一个为1的位号送给操作数OPRD1。操作数OPRD1，OPRD2可以是16位或32位通用寄存器或存储单元，但OPRD1和OPRD2操作数的长度必须相等。
1.7 举个简单的例子来说明这6条指令:
AA DW 1234H,5678H
BB DW 9999H,7777H
MOV EAX,12345678H
MOV BX,9999H
BT EAX,8;CF=0,EAX保持不变
BTC EAX,8;CF=0,EAX=12345778H
BTR EAX,8;CF=0,EAX=12345678H
BTS EAX,8;CF=0,EAX=12345778H
BSF AX,BX;AX=0
BSR AX,BX;AX=15
BT WORD PTR [AA],4;CF=1，[AA]的内容不变
BTC WORD PTR [AA],4;CF=1，[AA]=1223H
BTR WORD PTR [AA],4;CF=1，[AA]=1223H
BTS WORD PTR [AA],4;CF=1，[AA]=1234H
BSF WORD PTR [AA],BX;[AA]=0;
BSR WORD PTR [AA],BX;[AA]=15(十进制)
BT DWORD PTR [BB],12;CF=1,[BB]的内容保持不变
BTC DWORD PTR [BB],12;CF=1,[BB]=76779999H
BTR DWORD PTR [BB],12;CF=1,[BB]=76779999H
BTS DWORD PTR [BB],12;CF=1,[BB]=77779999H
BSF DWORD PTR [BB],12;[BB]=0
BSR DWORD PTR [BB],12;[BB]=31(十进制)
2.处理器控制指令
处理器控制指令主要是用来设置/清除标志，空操作以及与外部事件同步等。
2.1 CLC，将CF标志位清0。
2.2 STC，将CF标志位置1。
2.3 CLI，关中断。
2.4 STI，开中断。
2.5 CLD，清DF=0。
2.6 STD，置DF=1。
2.7 NOP，空操作，填补程序中的空白区，空操作本身不执行任何操作，主要是为了保持程序的连续性。
2.8 WAIT，等待BUSY引脚为高。
2.9 LOCK，封锁前缀可以锁定其后指令的操作数的存储单元，该指令在指令执行期间一直有效。在多任务环境中，可以用它来保证独占其享内存，只有以下指令才可以用LOCK前缀:
XCHG,ADD,ADC,INC,SUB,SBB,DEC,NEG,OR,AND,XOR,NOT,BT,BTS,BTR,BTC
3.0 说明处理器类型的伪指令
.8086，只支持对8086指令的汇编
.186，只支持对80186指令的汇编
.286，支持对非特权的80286指令的汇编
.286C，支持对非特权的80286指令的汇编
.286P，支持对80286所有指令的汇编
.386，支持对80386非特权指令的汇编
.386C，支持对80386非特权指令的汇编
.386P，支持对80386所有指令的汇编
只有用伪指令说明了处理器类型，汇编程序才知道如何更好去编译，连接程序，更好地去检错。
九，FPU instructions(摘自fasm的帮助文档中,有时间我会反它翻译成中文的)
The FPU (Floating-Point Unit) instructions operate on the floating–point
values in three formats: single precision (32–bit), double precision (64–bit)
and double extended precision (80–bit). The FPU registers form the stack
and each of them holds the double extended precision floating–point value.
When some values are pushed onto the stack or are removed from the top,
the FPU registers are shifted, so st0 is always the value on the top of FPU
stack, st1 is the first value below the top, etc. The st0 name has also the
synonym st.
fld pushes the floating–point value onto the FPU register stack. The
operand can be 32–bit, 64–bit or 80–bit memory location or the FPU register,
it’s value is then loaded onto the top of FPU register stack (the st0 register)
and is automatically converted into the double extended precision format.
fld dword [bx] ; load single prevision value from memory
fld st2 ; push value of st2 onto register stack
fld1, fldz, fldl2t, fldl2e, fldpi, fldlg2 and fldln2 load the commonly
used contants onto the FPU register stack. The loaded constants are
+1.0, +0.0, log2 10, log2 e, pi, log10 2 and ln 2 respectively. These instructions
have no operands.
fild convert the singed integer source operand into double extended precision
floating-point format and pushes the result onto the FPU register stack.
The source operand can be a 16–bit, 32–bit or 64–bit memory location.
fild qword [bx] ; load 64-bit integer from memory
fst copies the value of st0 register to the destination operand, which can
be 32–bit or 64–bit memory location or another FPU register. fstp performs
the same operation as fst and then pops the register stack, getting rid of
st0. fstp accepts the same operands as the fst instruction and can also
store value in the 80–bit memory.
fst st3 ; copy value of st0 into st3 register
fstp tword [bx] ; store value in memory and pop stack
fist converts the value in st0 to a signed integer and stores the result
in the destination operand. The operand can be 16–bit or 32–bit memory
location. fistp performs the same operation and then pops the register
stack, it accepts the same operands as the fist instruction and can also store
integer value in the 64–bit memory, so it has the same rules for operands as
fild instruction.
fbld converts the packed BCD integer into double extended precision
floating–point format and pushes this value onto the FPU stack. fbstp
converts the value in st0 to an 18–digit packed BCD integer, stores the
result in the destination operand, and pops the register stack. The operand
should be an 80–bit memory location.
fadd adds the destination and source operand and stores the sum in the
destination location. The destination operand is always an FPU register,
if the source is a memory location, the destination is st0 register and only
source operand should be specified. If both operands are FPU registers, at
least one of them should be st0 register. An operand in memory can be a
32–bit or 64–bit value.
fadd qword [bx] ; add double precision value to st0
fadd st2,st0 ; add st0 to st2
faddp adds the destination and source operand, stores the sum in the destination
location and then pops the register stack. The destination operand
must be an FPU register and the source operand must be the st0. When no
operands are specified, st1 is used as a destination operand.
38 CHAPTER 2. INSTRUCTION SET
faddp ; add st0 to st1 and pop the stack
faddp st2,st0 ; add st0 to st2 and pop the stack
fiadd instruction converts an integer source operand into double extended
precision floating–point value and adds it to the destination operand.
The operand should be a 16–bit or 32–bit memory location.
fiadd word [bx] ; add word integer to st0
fsub, fsubr, fmul, fdiv, fdivr instruction are similar to fadd, have
the same rules for operands and differ only in the perfomed computation.
fsub substracts the source operand from the destination operand, fsubr
substract the destination operand from the source operand, fmul multiplies
the destination and source operands, fdiv divides the destination operand by
the source operand and fdivr divides the source operand by the destination
operand. fsubp, fsubrp, fmulp, fdivp, fdivrp perform the same operations
and pop the register stack, the rules for operand are the same as for the faddp
instruction. fisub, fisubr, fimul, fidiv, fidivr perform these operations
after converting the integer source operand into floating–point value, they
have the same rules for operands as fiadd instruction.
fsqrt computes the square root of the value in st0 register, fsin computes
the sine of that value, fcos computes the cosine of that value, fchs
complements its sign bit, fabs clears its sign to create the absolute value,
frndint rounds it to the nearest integral value, depending on the current
rounding mode. f2xm1 computes the exponential value of 2 to the power of
st0 and substracts the 1.0 from it, the value of st0 must lie in the range ?1.0
to +1.0. All these instruction store the result in st0 and have no operands.
fsincos computes both the sine and the cosine of the value in st0 register,
stores the sine in st0 and pushes the cosine on the top of FPU register
stack. fptan computes the tangent of the value in st0, stores the result in
st0 and pushes a 1.0 onto the FPU register stack. fpatan computes the
arctangent of the value in st1 divided by the value in st0, stores the result
in st1 and pops the FPU register stack. fyl2x computes the binary logarithm
of st0, multiplies it by st1, stores the result in st1 and pop the FPU
register stack; fyl2xp1 performs the same operation but it adds 1.0 to st0
before computing the logarithm. fprem computes the remainder obtained
from dividing the value in st0 by the value in st1, and stores the result in
st0. fprem1 performs the same operation as fprem, but it computes the
remainder in the way specified by IEEE Standard 754. fscale truncates the
value in st1 and increases the exponent of st0 by this value. fxtract separates
the value in st0 into its exponent and significand, stores the exponent
in st0 and pushes the significand onto the register stack. fnop performs no
operation. These instruction have no operands.
fxch exchanges the contents of st0 an another FPU register. The operand
should be an FPU register, if no operand is specified, the contents of st0 and
st1 are exchanged.
fcom and fcomp compare the contents of st0 and the source operand and
set flags in the FPU status word according to the results. fcomp additionally
pops the register stack after performing the comparison. The operand can
be a single or double precision value in memory or the FPU register. When
no operand is specified, st1 is used as a source operand.
fcom ; compare st0 with st1
fcomp st2 ; compare st0 with st2 and pop stack
fcompp compares the contents of st0 and st1, sets flags in the FPU
status word according to the results and pops the register stack twice. This
instruction has no operands.
fucom, fucomp and fucompp performs an unordered comparison of two
FPU registers. Rules for operands are the same as for the fcom, fcomp and
fcompp, but the source operand must be an FPU register.
ficom and ficomp compare the value in st0 with an integer source
operand and set the flags in the FPU status word according to the results.
ficomp additionally pops the register stack after performing the comparison.
The integer value is converted to double extended precision floating–point
format before the comparison is made. The operand should be a 16–bit or
32–bit memory location.
ficom word [bx] ; compare st0 with 16-bit integer
fcomi, fcomip, fucomi, fucomip perform the comparison of st0 with
another FPU register and set the ZF, PF and CF flags according to the
results. fcomip and fucomip additionaly pop the register stack after performing
the comparison. The instructions obtained by attaching the FPU
condition mnemonic (see table 2.2) to the fcmov mnemonic transfer the specified
FPU register into st0 register if the fiven test condition is true. These
instruction allow two different syntaxes, one with single operand specifying
the source FPU register, and one with two operands, in that case destination
operand should be st0 register and the second operand specifies the source
FPU register.
fcomi st2 ; compare st0 with st2 and set flags
fcmovb st0,st2 ; transfer st2 to st0 if below
40 CHAPTER 2. INSTRUCTION SET
Mnemonic Condition tested Description
b CF = 1 below
e ZF = 1 equal
be CF or ZF = 1 below or equal
u PF = 1 unordered
nb CF = 0 not below
ne ZF = 0 not equal
nbe CF and ZF = 0 not below nor equal
nu PF = 0 not unordered
Table 2.2: FPU conditions.
ftst compares the value in st0 with 0.0 and sets the flags in the FPU
status word according to the results. fxam examines the contents of the st0
and sets the flags in FPU status word to indicate the class of value in the
register. These instructions have no operands.
fstsw and fnstsw store the current value of the FPU status word in the
destination location. The destination operand can be either a 16–bit memory
or the ax register. fstsw checks for pending umasked FPU exceptions before
storing the status word, fnstsw does not.
fstcw and fnstcw store the current value of the FPU control word at the
specified destination in memory. fstcw checks for pending umasked FPU
exceptions before storing the control word, fnstcw does not. fldcw loads
the operand into the FPU control word. The operand should be a 16–bit
memory location.
fstenv and fnstenv store the current FPU operating environment at the
memory location specified with the destination operand, and then mask all
FPU exceptions. fstenv checks for pending umasked FPU exceptions before
proceeding, fnstenv does not. fldenv loads the complete operating environment
from memory into the FPU. fsave and fnsave store the current FPU
state (operating environment and register stack) at the specified destination
in memory and reinitializes the FPU. fsave check for pending unmasked
FPU exceptions before proceeding, fnsave does not. frstor loads the FPU
state from the specified memory location. All these instructions need an
operand being a memory location.
finit and fninit set the FPU operating environment into its default
state. finit checks for pending unmasked FPU exception before proceeding,
fninit does not. fclex and fnclex clear the FPU exception flags in the
FPU status word. fclex checks for pending unmasked FPU exception before
proceeding, fnclex does not. wait and fwait are synonyms for the same
instruction, which causes the processor to check for pending unmasked FPU
exceptions and handle them before proceeding. These instruction have no
operands.
ffree sets the tag associated with specified FPU register to empty. The
operand should be an FPU register.
fincstp and fdecstp rotate the FPU stack by one by adding or substracting
one to the pointer of the top of stack. These instruction have no
operands.
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