扩展一个ESDHC3
一、硬件接线:
ESDHC3 所用到的引脚
port Pad Mode
CLK NANDF_CS7 ALT5
CMD NANDF_RDY_INT ALT5
DAT0 NANDF_D8 ALT5
DAT1 NANDF_D9 ALT5
DAT2 NANDF_D10 ALT5
DAT3/cd NANDF_D11 ALT5
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二、mmc3 驱动移植
正常的mmc1卡驱动的插入时的调试信息
mmc1: new high speed SD card at address 0001 mmcblk1: mmc1:0001 APPSD 481 MiB mmcblk1: p1 |
1、vi arch/arm/plat-mxc/include/mach/mx5x.h +238
238 + #define MXC_DMA_CHANNEL_MMC3 MXC_DMA_DYNAMIC_CHANNEL |
2、cd kernel_imx-pad/arch/arm/mach-mx5/
vi mx51_babbage.c +903
903 + mxcsdhc3_device.resource[2].start = IOMUX_TO_IRQ(MX51_PIN_GPIO1_6); 904 + mxcsdhc3_device.resource[2].end = IOMUX_TO_IRQ(MX51_PIN_GPIO1_6); 905 + mxcsdhc2_device.resource[2].start = 132; 906 + mxcsdhc2_device.resource[2].end = 132; |
- static int sdhc_write_protect(struct device *dev) - { - unsigned short rc = 0; - if (to_platform_device(dev)->id == 0) - rc = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1)); - else - rc = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5)); - return rc; - } 623 static int sdhc_write_protect(struct device *dev) 624 { 625 unsigned short rc = 0; 626 627 if (to_platform_device(dev)->id == 0){ 628 rc = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1)); 629 } 630 if (to_platform_device(dev)->id == 1){ 631 rc = 0 ; 632 } 633 // else 634 if (to_platform_device(dev)->id == 2){ 635 rc = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5)); 636 } 637 // printk("=============protect-rc=%d=====",rc); 638 return rc; 639 } |
- static unsigned int sdhc_get_card_det_status(struct device *dev) - { - int ret; - if (to_platform_device(dev)->id == 0) { - ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0)); - return ret; - } else { /* config the det pin for SDHC2 */ - if (board_is_rev(BOARD_REV_2)) - /* BB2.5 */ - ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6)); - else - /* BB2.0 */ - ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4)); - return ret; - } - } //add 641 static unsigned int sdhc_get_card_det_status(struct device *dev) 642 { 643 int ret; 644 645 if (to_platform_device(dev)->id == 0) { 646 ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0)); 647 } 648 if (to_platform_device(dev)->id == 1) { 649 ret=0 ; 650 } 651 if (to_platform_device(dev)->id == 2) { 652 ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6)); 653 } 654 // printk("=============protect-ret=%d=====",ret); 655 return ret ; 656 657 // } else { /* config the det pin for SDHC2 */ 658 // if (board_is_rev(BOARD_REV_2)) 659 // /* BB2.5 */ 660 // ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6)); 661 // else 662 // /* BB2.0 */ 663 // ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4)); 664 // return ret; 665 // } 666 } //add 692 static struct mxc_mmc_platform_data mmc3_data = { 693 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | 694 MMC_VDD_31_32, 695 .caps = MMC_CAP_4_BIT_DATA, 696 .min_clk = 150000, 697 .max_clk = 50000000, 698 .card_inserted_state = 0, 699 .status = sdhc_get_card_det_status, 700 .wp_status = sdhc_write_protect, 701 .clock_mmc = "esdhc_clk", 702 }; |
3、vi mx51_babbage_gpio.c
555 //add by renjie 556 mxc_iomux_set_input(MUX_IN_ESDHC3_IPP_DAT0_IN_SELECT_INPUT,0x01); 557 mxc_iomux_set_input(MUX_IN_ESDHC3_IPP_DAT1_IN_SELECT_INPUT,0x01); 558 mxc_iomux_set_input(MUX_IN_ESDHC3_IPP_DAT2_IN_SELECT_INPUT,0x01); 559 mxc_iomux_set_input(MUX_IN_ESDHC3_IPP_DAT3_IN_SELECT_INPUT,0x01); - if (board_is_rev(BOARD_REV_2)) { - /* SD2 CD for BB2.5 */ - gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6), "gpio1_6"); - gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6)); - } else { - /* SD2 CD for BB2.0 */ - gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4), "gpio1_4"); - gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4)); - } 569 + // if (board_is_rev(BOARD_REV_2)) { 570 + /* SD2 CD for BB2.5 */ 571 + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6), "gpio1_6"); 572 + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6)); 573 + // } else { 574 + /* SD2 CD for BB2.0 */ 575 + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4), "gpio1_4"); 576 + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4)); 577 + // } |
//add 343 { /* wifi Ctl */ 344 MX51_PIN_GPIO1_9, IOMUX_CONFIG_ALT0, 345 (PAD_CTL_SRE_SLOW | PAD_CTL_DRV_LOW | PAD_CTL_ODE_OPENDRAIN_NONE | 346 PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | 347 PAD_CTL_HYS_ENABLE), 348 }, 349 //end 350 { /* esdhc3 */ 351 MX51_PIN_NANDF_RDY_INT, IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION, 352 (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), 353 }, 354 { 355 MX51_PIN_NANDF_CS7, IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION, 356 (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), 357 }, 358 { 359 MX51_PIN_NANDF_D8, IOMUX_CONFIG_ALT5, 360 (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), 361 }, 362 { 363 MX51_PIN_NANDF_D9, IOMUX_CONFIG_ALT5, 364 (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), 365 }, 366 { 367 MX51_PIN_NANDF_D10, IOMUX_CONFIG_ALT5, 368 (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), 369 }, 370 { 371 MX51_PIN_NANDF_D11, IOMUX_CONFIG_ALT5, 372 (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), 373 }, |
4、vi kernel_imx-pad/arch/arm/mach-mx5/dma.c +250
//add for mmc3 static mxc_sdma_channel_params_t mxc_sdma_mmc2_width1_params = { .chnl_params = { .watermark_level = MXC_SDHC_MMC_WML, .per_address = MMC_SDHC3_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, .peripheral_type = MMC, .transfer_type = per_2_emi, .event_id = DMA_REQ_SDHC3, .bd_number = 32, .word_size = TRANSFER_32BIT, }, .channel_num = MXC_DMA_CHANNEL_MMC3, .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, }; static mxc_sdma_channel_params_t mxc_sdma_mmc2_width4_params = { .chnl_params = { .watermark_level = MXC_SDHC_SD_WML, .per_address = MMC_SDHC3_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, .peripheral_type = MMC, .transfer_type = per_2_emi, .event_id = DMA_REQ_SDHC3, .bd_number = 32, .word_size = TRANSFER_32BIT, }, .channel_num = MXC_DMA_CHANNEL_MMC3, .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, }; //add end //add 1137 {MXC_DMA_MMC3_WIDTH_1, &mxc_sdma_mmc3_width1_params}, 1138 {MXC_DMA_MMC3_WIDTH_4, &mxc_sdma_mmc3_width4_params}, |
5、dma.h
// add 40 MXC_DMA_MMC3_WIDTH_1, 41 MXC_DMA_MMC3_WIDTH_4, |
6、driver/mmc/host/mx_sdhci.c +969
- 969 if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) { - 970 if (host->id == 0) - 971 dev_id = MXC_DMA_MMC1_WIDTH_4; - 972 else - 973 dev_id = MXC_DMA_MMC2_WIDTH_4; - 974 } else { - 975 if (host->id == 0) - 976 dev_id = MXC_DMA_MMC1_WIDTH_1; - 977 else - 978 dev_id = MXC_DMA_MMC2_WIDTH_1; - 979 } //add if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) { if (host->id == 0){ dev_id = MXC_DMA_MMC1_WIDTH_4; } if (host->id == 1){ dev_id = MXC_DMA_MMC2_WIDTH_4; } if (host->id == 2){ dev_id = MXC_DMA_MMC3_WIDTH_4; } } else { if (host->id == 0){ dev_id = MXC_DMA_MMC1_WIDTH_1; } if (host->id == 1){ dev_id = MXC_DMA_MMC2_WIDTH_1; } if (host->id == 2){ dev_id = MXC_DMA_MMC3_WIDTH_1 } } |