【TINY4412】U-BOOT移植笔记:(2)拷贝模板

【TINY4412】U-BOOT移植笔记:(2)拷贝模板

宿主机 : 虚拟机 Ubuntu 16.04 LTS / X64
目标板[底板]: Tiny4412SDK - 1506
目标板[核心板]: Tiny4412 - 1412
U-BOOT版本: 2017.03
交叉编译器: gcc-arm-none-eabi-5_4-2016q3
日期: 2017-4-22 09:01:51
作者: SY

选择模板origen

  • 拷贝
root@ubuntu:/opt/u-boot-2017.03# cd board/samsung/
root@ubuntu:/opt/u-boot-2017.03/board/samsung# ls
arndale  espresso7420  odroid  smdk5250  smdkc100  trats   universal_c210
common   goni          origen  smdk5420  smdkv310  trats2
root@ubuntu:/opt/u-boot-2017.03/board/samsung# cp -R origen/ tiny4412
root@ubuntu:/opt/u-boot-2017.03/board/samsung# cd tiny4412/
root@ubuntu:/opt/u-boot-2017.03/board/samsung/tiny4412# ls
Kconfig  MAINTAINERS  Makefile  origen.c  tools
  • 修改 ./board/samsung/tiny4412/Kconfig
root@ubuntu:/opt/u-boot-2017.03# git diff d41eed board/samsung/tiny4412/Kconfig 
diff --git a/board/samsung/tiny4412/Kconfig b/board/samsung/tiny4412/Kconfig
index 63e3efe..06a7905 100644
--- a/board/samsung/tiny4412/Kconfig
+++ b/board/samsung/tiny4412/Kconfig
@@ -1,12 +1,12 @@
-if TARGET_ORIGEN
+if TARGET_TINY4412

config SYS_BOARD
-       default "origen"
+       default "tiny4412"

config SYS_VENDOR
default "samsung"

config SYS_CONFIG_NAME
-       default "origen"
+       default "tiny4412"

endif
  • 修改 ./board/samsung/tiny4412/MAINTAINERS
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03/board/samsung/origen/ board/samsung/tiny4412/MAINTAINERS 
diff --git a/../temp/u-boot-2017.03/board/samsung/origen/MAINTAINERS b/board/samsung/tiny4412/MAINTAINERS
index 8bf373e..5de019c 100644
--- a/../temp/u-boot-2017.03/board/samsung/origen/MAINTAINERS
+++ b/board/samsung/tiny4412/MAINTAINERS
@@ -1,6 +1,6 @@
-ORIGEN BOARD
-M:     Chander Kashyap <k.chander@samsung.com>
+TINY4412 BOARD
+M:     Chander SY <1530454315@qq.com>
S:     Maintained
-F:     board/samsung/origen/
-F:     include/configs/origen.h
-F:     configs/origen_defconfig
+F:     board/samsung/tiny4412/
+F:     include/configs/tiny4412.h
+F:     configs/tiny4412_defconfig
  • 修改 ./board/samsung/tiny4412/Makefile
root@ubuntu:/opt/u-boot-2017.03# git diff d41eed board/samsung/tiny4412/Makefile 
diff --git a/board/samsung/tiny4412/Makefile b/board/samsung/tiny4412/Makefile
index 1add9fe..0beabeb 100644
--- a/board/samsung/tiny4412/Makefile
+++ b/board/samsung/tiny4412/Makefile
@@ -8,7 +8,7 @@ ifdef CONFIG_SPL_BUILD
# necessary to create built-in.o
obj- := __dummy__.o

-hostprogs-y := tools/mkorigenspl
+hostprogs-y := tools/mktiny4412spl
always := $(hostprogs-y)

# omit -O2 option to suppress
@@ -16,7 +16,7 @@ always := $(hostprogs-y)
#
# TODO:
# Fix the root cause in tools/mkorigenspl.c and delete the following work-around
-$(obj)/tools/mkorigenspl: HOSTCFLAGS:=$(filter-out -O2,$(HOSTCFLAGS))
+$(obj)/tools/mktiny4412spl: HOSTCFLAGS:=$(filter-out -O2,$(HOSTCFLAGS))
else
-obj-y  += origen.o
+obj-y  += tiny4412.o
endif
  • 修改 ./board/samsung/tiny4412/tiny4412.c
git diff ../temp/u-boot-2017.03/board/samsung/origen/origen.c board/samsung/tiny4412/tiny4412.c
只修改文件名
  • 修改 ./board/samsung/tiny4412/mktiny4412spl.c
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03/board/
samsung/origen/tools/mkorigenspl.c 
board/samsung/tiny4412/tools/mktiny4412spl.c 
diff --git a/../temp/u-boot-2017.03/board/samsung/origen/tools/
mkorigenspl.c b/board/samsung/tiny4412/tools/mktiny4412spl.c
index 7b5d93b..ea61635 100644
--- a/../temp/u-boot-2017.03/board/samsung/origen/tools/mkorigenspl.c
+++ b/board/samsung/tiny4412/tools/mktiny4412spl.c
@@ -12,12 +12,10 @@
#include <string.h>
#include <sys/stat.h>

+#define CHECKSUM_OFFSET                (14*1024-4)
#define BUFSIZE                        (16*1024)
-#define IMG_SIZE               (16*1024)
-#define SPL_HEADER_SIZE                16
#define FILE_PERM              (S_IRUSR | S_IWUSR | S_IRGRP \
| S_IWGRP | S_IROTH | S_IWOTH)
-#define SPL_HEADER             "S5PC210 HEADER  "
/*
* Requirement:
* IROM code reads first 14K bytes from boot device.
@@ -26,10 +24,10 @@
*
* This function takes two filenames:
* IN  "u-boot-spl.bin" and
-* OUT "$(BOARD)-spl.bin as filenames.
+* OUT "u-boot-mmc-spl.bin" as filenames.
* It reads the "u-boot-spl.bin" in 16K buffer.
* It calculates checksum of 14K-4 Bytes and stores at 14K-4 offset in buffer.
-* It writes the buffer to "$(BOARD)-spl.bin" file.
+* It writes the buffer to "u-boot-mmc-spl.bin" file.
*/

int main(int argc, char **argv)
@@ -63,12 +61,9 @@ int main(int argc, char **argv)
len = lseek(ifd, 0, SEEK_END);
lseek(ifd, 0, SEEK_SET);

-       memcpy(&buffer[0], SPL_HEADER, SPL_HEADER_SIZE);
+       count = (len < CHECKSUM_OFFSET) ? len : CHECKSUM_OFFSET;

-       count = (len < (IMG_SIZE - SPL_HEADER_SIZE))
-               ? len : (IMG_SIZE - SPL_HEADER_SIZE);
-
-       if (read(ifd, buffer + SPL_HEADER_SIZE, count) != count) {
+       if (read(ifd, buffer, count) != count) {
fprintf(stderr, "%s: Can't read %s: %s\n",
argv[0], argv[1], strerror(errno));

@@ -80,14 +75,10 @@ int main(int argc, char **argv)
exit(EXIT_FAILURE);
}

-       for (i = 0; i < IMG_SIZE - SPL_HEADER_SIZE; i++)
-               checksum += buffer[i+16];
-
-       *(unsigned long *)buffer ^= 0x1f;
-       *(unsigned long *)(buffer+4) ^= checksum;
+       for (i = 0, checksum = 0; i < CHECKSUM_OFFSET; i++)
+               checksum += buffer[i];

-       for (i = 1; i < SPL_HEADER_SIZE; i++)
-               buffer[i] ^= buffer[i-1];
+       memcpy(&buffer[CHECKSUM_OFFSET], &checksum, sizeof(checksum));

if (write(ofd, buffer, BUFSIZE) != BUFSIZE) {
fprintf(stderr, "%s: Can't write %s: %s\n",
(END)   
  • 修改 ./include/configs/tiny4412.h
root@ubuntu:/opt/u-boot-2017.03# cp include/configs/origen.h include/configs/tiny4412.h
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03
/include/configs/origen.h include/configs/tiny4412.h  
diff --git a/../temp/u-boot-2017.03/include/configs/origen.h 
b/include/configs/tiny4412.h
index 26fe402..c8990a3 100644
--- a/../temp/u-boot-2017.03/include/configs/origen.h
+++ b/include/configs/tiny4412.h
@@ -6,14 +6,24 @@
* SPDX-License-Identifier:    GPL-2.0+
*/

-#ifndef __CONFIG_ORIGEN_H
-#define __CONFIG_ORIGEN_H
+#ifndef __CONFIG_TINY4412_H
+#define __CONFIG_TINY4412_H

#include <configs/exynos4-common.h>

/* High Level Configuration Options */
-#define CONFIG_EXYNOS4210              1       /* which is a EXYNOS4210 SoC */
-#define CONFIG_ORIGEN                  1       /* working with ORIGEN*/
+#define CONFIG_EXYNOS4412                  1    /* which is a EXYNOS4412 SoC */
+#define CONFIG_TINY4412                        1        /* working with ORIGEN*/
+
+/* DEBUG UART */
+
+#define CONFIG_DEBUG_UART                      1       
+#define CONFIG_SPL_SERIAL_SUPPORT      1
+#define CONFIG_SPL_GPIO_SUPPORT                1
+#define CONFIG_DEBUG_UART_S5P          1
+#define CONFIG_DEBUG_UART_BASE         0x13800000
+#define CONFIG_DEBUG_UART_CLOCK                (100000000)
+

#define CONFIG_SYS_DCACHE_OFF          1

@@ -28,16 +38,16 @@
#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_SDRAM_BASE + 0x6000000)
#define CONFIG_SYS_LOAD_ADDR           (CONFIG_SYS_SDRAM_BASE + 0x3E00000)

-#define CONFIG_SYS_TEXT_BASE           0x43E00000
+#define CONFIG_SYS_TEXT_BASE           0x43E00000 

-#define CONFIG_MACH_TYPE               MACH_TYPE_ORIGEN
+#define CONFIG_MACH_TYPE               MACH_TYPE_TINY4412

/* select serial console configuration */
-#define CONFIG_SERIAL2
+#define CONFIG_SERIAL0
#define CONFIG_BAUDRATE                        115200

/* Console configuration */
-#define CONFIG_DEFAULT_CONSOLE         "console=ttySAC1,115200n8\0"
+#define CONFIG_DEFAULT_CONSOLE         "console=ttySAC0,115200n8\0"

#define CONFIG_SYS_MEM_TOP_HIDE        (1 << 20)       /* ram console */

@@ -52,14 +62,14 @@

/* MMC SPL */
#define COPY_BL2_FNPTR_ADDR    0x02020030
-#define CONFIG_SPL_TEXT_BASE   0x02021410
+#define CONFIG_SPL_TEXT_BASE   0x02023400

#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x40007000\0" \
"rdaddr=0x48000000\0" \
"kerneladdr=0x40007000\0" \
"ramdiskaddr=0x48000000\0" \
-       "console=ttySAC2,115200n8\0" \
+       "console=ttySAC0,115200n8\0" \
"mmcdev=0\0" \
"bootenv=uEnv.txt\0" \
"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
@@ -94,17 +104,16 @@
#define CONFIG_SYS_MMC_ENV_DEV         0
#define CONFIG_ENV_SIZE                        (16 << 10)      /* 16 KB */
#define RESERVE_BLOCK_SIZE             (512)
-#define BL1_SIZE                       (16 << 10) /*16 K reserved for BL1*/
+#define BL1_SIZE                       (8 << 10) /* 8K reserved for BL1*/
#define CONFIG_ENV_OFFSET              (RESERVE_BLOCK_SIZE + BL1_SIZE)

#define CONFIG_SPL_LDSCRIPT    "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_MAX_FOOTPRINT       (14 * 1024)

-#define CONFIG_SYS_INIT_SP_ADDR                0x02040000
+#define CONFIG_SYS_INIT_SP_ADDR                0x02040000 

/* U-Boot copy size from boot Media to DRAM.*/
#define COPY_BL2_SIZE          0x80000
#define BL2_START_OFFSET       ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
#define BL2_SIZE_BLOC_COUNT    (COPY_BL2_SIZE/512)
-
#endif /* __CONFIG_H */
  • 修改 ./configs/tiny4412_defconfig
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03/configs/origen_defconfig configs/tiny4412_defconfig
diff --git a/../temp/u-boot-2017.03/configs/origen_defconfig b/configs/tiny4412_defconfig
index dfb08fb..0da8adf 100644
--- a/../temp/u-boot-2017.03/configs/origen_defconfig
+++ b/configs/tiny4412_defconfig
@@ -1,14 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS4=y
-CONFIG_TARGET_ORIGEN=y
-CONFIG_IDENT_STRING=" for ORIGEN"
-CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen"
+CONFIG_TARGET_TINY4412=y
+CONFIG_IDENT_STRING=" for TINY4412"
+CONFIG_DEFAULT_DEVICE_TREE="exynos4412-tiny4412"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="ORIGEN # "
+CONFIG_SYS_PROMPT="TINY4412# "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
@@ -44,3 +44,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Samsung"
CONFIG_G_DNL_VENDOR_NUM=0x04e8
CONFIG_G_DNL_PRODUCT_NUM=0x6601
+
+
  • 修改 ./arch/arm/mach-exynos/Kconfig
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03/
arch/arm/mach-exynos/Kconfig arch/arm/mach-exynos/Kconfig 
diff --git a/../temp/u-boot-2017.03/arch/arm/mach-exynos/Kconfig 
b/arch/arm/mach-exynos/Kconfig
index 46981a5..fc29d0a 100644
--- a/../temp/u-boot-2017.03/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -59,6 +59,10 @@ config TARGET_TRATS2
config TARGET_ODROID
bool "Exynos4412 Odroid board"

+config TARGET_TINY4412
+       bool "Exynos4412 Tiny4412 board"
+       select SUPPORT_SPL
+
endchoice
endif

@@ -155,5 +159,6 @@ source "board/samsung/arndale/Kconfig"
source "board/samsung/smdk5250/Kconfig"
source "board/samsung/smdk5420/Kconfig"
source "board/samsung/espresso7420/Kconfig"
+source "board/samsung/tiny4412/Kconfig"

endif
  • 修改 ./arch/arm/mach-exynos/Makefile
root@ubuntu:/opt/u-boot-2017.03# cp ../u-boot-2017.03_bkp/arch/arm
/mach-exynos/clock_init_exynos4412.c arch/arm/mach-exynos/
root@ubuntu:/opt/u-boot-2017.03# cp ../u-boot-2017.03_bkp/arch/arm
/mach-exynos/dmc_init_exynos4412.c arch/arm/mach-exynos/ 
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03
/arch/arm/mach-exynos/Makefile arch/arm/mach-exynos/Makefile 
diff --git a/../temp/u-boot-2017.03/arch/arm/mach-exynos/Makefile 
b/arch/arm/mach-exynos/Makefile
index 0cc6c32..f2cd76d 100644
--- a/../temp/u-boot-2017.03/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -15,6 +15,7 @@ ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_EXYNOS5)  += clock_init_exynos5.o
obj-$(CONFIG_EXYNOS5)  += dmc_common.o dmc_init_ddr3.o
obj-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
+obj-$(CONFIG_EXYNOS4412)+= dmc_init_exynos4412.o clock_init_exynos4412.o
obj-y  += spl_boot.o tzpc.o
obj-y  += lowlevel_init.o
endif
  • 修改 ./arch/arm/mach-exynos/exynos4_setup.h
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03/arch
/arm/mach-exynos/exynos4_setup.h arch/arm/mach-exynos/exynos4_setup.h 
diff --git a/../temp/u-boot-2017.03/arch/arm/mach-exynos/exynos4_setup.h 
b/arch/arm/mach-exynos/exynos4_setup.h
index 9f29d94..f4e2c8b 100644
--- a/../temp/u-boot-2017.03/arch/arm/mach-exynos/exynos4_setup.h
+++ b/arch/arm/mach-exynos/exynos4_setup.h
@@ -6,8 +6,8 @@
* SPDX-License-Identifier:    GPL-2.0+
*/

-#ifndef _ORIGEN_SETUP_H
-#define _ORIGEN_SETUP_H
+#ifndef _EXYNOS4_SETUP_H
+#define _EXYNOS4_SETUP_H

#include <config.h>
#include <asm/arch/cpu.h>
@@ -434,7 +434,7 @@ struct mem_timings {
#define ABP_SFR_SLV1_SINGLE_ADDRMAP_START_OFFSET       0x828
#define ABP_SFR_SLV1_SINGLE_ADDRMAP_END_OFFSET 0x830

-#ifdef CONFIG_ORIGEN
+#ifdef CONFIG_TINY4412
/* Interleave: 2Bit, Interleave_bit1: 0x15, Interleave_bit0: 0x7 */
#define APB_SFR_INTERLEAVE_CONF_VAL    0x20001507
#define APB_SFR_ARBRITATION_CONF_VAL   0x00000001
@@ -556,7 +556,7 @@ struct mem_timings {

#define CONTROL2_VAL           0x00000000

-#ifdef CONFIG_ORIGEN
+#ifdef CONFIG_TINY4412
#define TIMINGREF_VAL          0x000000BB
#define TIMINGROW_VAL          0x4046654f
#define        TIMINGDATA_VAL          0x46400506
  • 修改 ./arch/arm/include/asm/mach-types.h
已经添加,不用修改
  • 修改 ./arch/arm/dts/exynos4412-tiny4412.dts
root@ubuntu:/opt/u-boot-2017.03# cp ./arch/arm/dts/exynos4412-odroid.dts
arch/arm/dts/exynos4412-tiny4412.dts
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03/arch
/arm/dts/exynos4412-odroid.dts arch/arm/dts/exynos4412-tiny4412.dts 
diff --git a/../temp/u-boot-2017.03/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-tiny4412.dts
index 188cb93..9307c0b 100644
--- a/../temp/u-boot-2017.03/arch/arm/dts/exynos4412-odroid.dts
+++ b/arch/arm/dts/exynos4412-tiny4412.dts
@@ -11,260 +11,20 @@
#include "exynos4412.dtsi"

/ {
-       model = "Odroid based on Exynos4412";
-       compatible = "samsung,odroid", "samsung,exynos4412";
+       model = "Tiny4412 based on Exynos4412";
+       compatible = "samsung,tiny4412", "samsung,exynos4412";

-       aliases {
-               i2c0 = "/i2c@13860000";
-               i2c1 = "/i2c@13870000";
-               i2c2 = "/i2c@13880000";
-               i2c3 = "/i2c@13890000";
-               i2c4 = "/i2c@138a0000";
-               i2c5 = "/i2c@138b0000";
-               i2c6 = "/i2c@138c0000";
-               i2c7 = "/i2c@138d0000";
-               serial0 = "/serial@13800000";
-               console = "/serial@13810000";
-               mmc2 = "/sdhci@12530000";
-               mmc4 = "/dwmmc@12550000";
+       chosen {
+               stdout-path = "serial0";
};

-       i2c@13860000 {
-               samsung,i2c-sda-delay = <100>;
-               samsung,i2c-slave-addr = <0x10>;
-               samsung,i2c-max-bus-freq = <100000>;
-               status = "okay";
-
-               max77686_pmic@09 {
-                       compatible = "maxim,max77686";
-                       interrupts = <7 0>;
-                       reg = <0x09 0 0>;
-                       #clock-cells = <1>;
-
-                       voltage-regulators {
-                               ldo1_reg: LDO1 {
-                                       regulator-name = "VDD_ALIVE_1.0V";
-                                       regulator-min-microvolt = <1000000>;
-                                       regulator-max-microvolt = <1000000>;
-                               };
-
-                               ldo2_reg: LDO2 {
-                                       regulator-name = "VDDQ_VM1M2_1.2V";
-                                       regulator-min-microvolt = <1200000>;
-                                       regulator-max-microvolt = <1200000>;
-                               };
-
-                               ldo3_reg: LDO3 {
-                                       regulator-name = "VCC_1.8V_AP";
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                               };
-
-                               ldo4_reg: LDO4 {
-                                       regulator-name = "VDDQ_MMC2_2.8V";
-                                       regulator-min-microvolt = <2800000>;
-                                       regulator-max-microvolt = <2800000>;
-                               };
-
-                               ldo5_reg: LDO5 {
-                                       regulator-name = "VDDQ_MMC0/1/3_1.8V";
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                               };
-
-                               ldo6_reg: LDO6 {
-                                       regulator-name = "VMPLL_1.0V";
-                                       regulator-min-microvolt = <1100000>;
-                                       regulator-max-microvolt = <1100000>;
-                               };
-
-                               ldo7_reg: LDO7 {
-                                       regulator-name = "VPLL_1.1V";
-                                       regulator-min-microvolt = <1100000>;
-                                       regulator-max-microvolt = <1100000>;
-                               };
-
-                               ldo8_reg: LDO8 {
-                                       regulator-name = "VDD_MIPI/HDMI_1.0V";
-                                       regulator-min-microvolt = <1000000>;
-                                       regulator-max-microvolt = <1000000>;
-                               };
-
-                               ldo10_reg: LDO10 {
-                                       regulator-name = "VDD_MIPI/HDMI_1.8V";
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                               };
-
-                               ldo11_reg: LDO11 {
-                                       regulator-name = "VDD_ABB1_1.8V";
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                               };
-
-                               ldo12_reg: LDO12 {
-                                       regulator-name = "VDD_UOTG_3.0V";
-                                       regulator-min-microvolt = <3000000>;
-                                       regulator-max-microvolt = <3000000>;
-                               };
-
-                               ldo13_reg: LDO13 {
-                                       regulator-name = "VDD_C2C_1.8V";
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                               };
-
-                               ldo14_reg: LDO14 {
-                                       regulator-name = "VDD_ABB02_1.8V";
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                               };
-
-                               ldo15_reg: LDO15 {
-                                       regulator-name = "VDD_HSIC/OTG_1.0V";
-                                       regulator-min-microvolt = <1000000>;
-                                       regulator-max-microvolt = <1000000>;
-                               };
-
-                               ldo16_reg: LDO16 {
-                                       regulator-name = "VDD_HSIC_1.8V";
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                               };
-
-                               ldo17_reg: LDO17 {
-                                       regulator-name = "VDDQ_CAM_1.2V";
-                                       regulator-min-microvolt = <1200000>;
-                                       regulator-max-microvolt = <1200000>;
-                               };
-
-                               ldo20_reg: LDO20 {
-                                       regulator-name = "VDDQ_EMMC_1.8V";
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                                       regulator-always-on;
-                                       regulator-boot-on;
-                               };
-
-                               ldo21_reg: LDO21 {
-                                       regulator-name = "TFLASH_2.8V";
-                                       regulator-min-microvolt = <2800000>;
-                                       regulator-max-microvolt = <2800000>;
-                                       regulator-always-on;
-                                       regulator-boot-on;
-                               };
-
-                               ldo22_reg: LDO22 {
-                                       regulator-name = "VDDQ_EMMC_2.8V";
-                                       regulator-min-microvolt = <2800000>;
-                                       regulator-max-microvolt = <2800000>;
-                                       regulator-always-on;
-                                       regulator-boot-on;
-                               };
-
-                               ldo25_reg: LDO25 {
-                                       regulator-compatible = "LDO25";
-                                       regulator-name = "VDDQ_LCD_3.0V";
-                                       regulator-min-microvolt = <3000000>;
-                                       regulator-max-microvolt = <3000000>;
-                               };
-
-                               buck1_reg: BUCK1 {
-                                       regulator-name = "VDD_MIF_1.0V";
-                                       regulator-min-microvolt = <8500000>;
-                                       regulator-max-microvolt = <1100000>;
-                               };
-
-                               buck2_reg: BUCK2 {
-                                       regulator-name = "VDD_ARM_1.0V";
-                                       regulator-min-microvolt = <850000>;
-                                       regulator-max-microvolt = <1500000>;
-                               };
-
-                               buck3_reg: BUCK3 {
-                                       regulator-name = "VDD_INT_1.1V";
-                                       regulator-min-microvolt = <850000>;
-                                       regulator-max-microvolt = <1150000>;
-                               };
-
-                               buck4_reg: BUCK4 {
-                                       regulator-name = "VDD_G3D_1.0V";
-                                       regulator-min-microvolt = <850000>;
-                                       regulator-max-microvolt = <1150000>;
-                               };
-
-                               buck5_reg: BUCK5 {
-                                       regulator-name = "VDDQ_AP_1.2V";
-                                       regulator-min-microvolt = <1200000>;
-                                       regulator-max-microvolt = <1200000>;
-                               };
-
-                               buck6_reg: BUCK6 {
-                                       regulator-name = "VCC_INL1/7_1.35V";
-                                       regulator-min-microvolt = <1350000>;
-                                       regulator-max-microvolt = <1350000>;
-                               };
-
-                               buck7_reg: BUCK7 {
-                                       regulator-name = "VCC_INL2/3/5_2.0V";
-                                       regulator-min-microvolt = <2000000>;
-                                       regulator-max-microvolt = <2000000>;
-                               };
-
-                               buck8_reg: BUCK8 {
-                                       regulator-name = "VCC_P3V3_2.85V";
-                                       regulator-min-microvolt = <2850000>;
-                                       regulator-max-microvolt = <3300000>;
-                               };
-                       };
-               };
+       aliases {
+               serial0 = "/serial@13800000";
+               console = "/serial@13800000";
};

-       serial@13810000 {
+       serial0:serial@13810000 {
status = "okay";
};

-       sdhci@12510000 {
-               status = "disabled";
-       };
-
-       sdhci@12520000 {
-               status = "disabled";
-       };
-
-       sdhci@12530000 {
-               samsung,bus-width = <4>;
-               samsung,timing = <1 2 3>;
-               cd-gpios = <&gpk2 2 0>;
-       };
-
-       sdhci@12540000 {
-               status = "disabled";
-       };
-
-       dwmmc@12550000 {
-               samsung,bus-width = <8>;
-               samsung,timing = <2 1 0>;
-               samsung,removable = <0>;
-               fifoth_val = <0x203f0040>;
-               bus_hz = <400000000>;
-               div = <0x3>;
-               index = <4>;
-       };
-
-       ehci@12580000 {
-               compatible = "samsung,exynos-ehci";
-               reg = <0x12580000 0x100>;
-               #address-cells = <1>;
-               #size-cells = <1>;
-               phy {
-                       compatible = "samsung,exynos-usb-phy";
-                       reg = <0x125B0000 0x100>;
-               };
-       };
-
-       emmc-reset {
-               compatible = "samsung,emmc-reset";
-               reset-gpio = <&gpk1 2 0>;
-       };
};
(END)
  • 修改 ./arch/arm/dts/Makefile
root@ubuntu:/opt/u-boot-2017.03# git diff ../temp/u-boot-2017.03/arch
/arm/dts/Makefile arch/arm/dts/Makefile               
diff --git a/../temp/u-boot-2017.03/arch/arm/dts/Makefile 
b/arch/arm/dts/Makefile
index eb68c20..ebd0ca4 100644
--- a/../temp/u-boot-2017.03/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -14,7 +14,8 @@ dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
exynos4210-universal_c210.dtb \
exynos4210-trats.dtb \
exynos4412-trats2.dtb \
-       exynos4412-odroid.dtb
+       exynos4412-odroid.dtb \
+       exynos4412-tiny4412.dtb

dtb-$(CONFIG_TARGET_HIKEY) += hi6220-hikey.dtb
  • 增加 ./arch/arm/mach-exynos/clock_init_exynos4412.h
- root@ubuntu:/opt/u-boot-2017.03# vim arch/arm/mach-exynos/exynos4412_setup.h 
/*
- Copyright (C) 2014 Samsung Electronics
- Przemyslaw Marczak p.marczak@samsung.com
*
- SPDX-License-Identifier:    GPL-2.0
*/
ifndef _CLOCK_INIT_EXYNOS4412H
define _CLOCK_INIT_EXYNOS4412H
/* A/M/E/V PLL_CON0 */
define SDIV(x)                 ((x) & 0x7)
define PDIV(x)                 (((x) & 0x3f) << 8)
define MDIV(x)                 (((x) & 0x3ff) << 16)
define FSEL(x)                 (((x) & 0x1) << 27)
define PLL_LOCKED_BIT          (0x1 << 29)
define PLL_ENABLE(x)           (((x) & 0x1) << 31)
/* A/M PLL_CON1 */
define AFC(x)                 ((x) & 0xf)
define LOCK_CON_DLY(x)        (((x) & 0xf) << 8)
define LOCK_CON_IN(x)        (((x) & 0x3) << 12)
define LOCK_CON_OUT(x)        (((x) & 0x3) << 14)
define FEED_EN(x)        (((x) & 0x1) << 16)
define AFC_ENB(x)        (((x) & 0x1) << 20)
define DCC_ENB(x)        (((x) & 0x1) << 21)
define BYPASS(x)        (((x) & 0x1) << 22)
define RESV0(x)        (((x) & 0x1) << 23)
define RESV1(x)        (((x) & 0x1) << 24)
/* E/V PLL_CON1 */
define K(x)                 ((x) & 0xffff)
define MFR(x)        (((x) & 0xff) << 16)
define MRR(x)        (((x) & 0x1f) << 24)
define SEL_PF(x)        (((x) & 0x3) << 9)
/* E/V PLL_CON2 */
define ICP_BOOST(x)    ((x) & 0x3)
define FSEL_E_V(x)        (((x) & 0x1) << 2)
define FVCO_EN(x)        (((x) & 0x1) << 3)
define BYPASS_E_V(x)        (((x) & 0x1) << 4)
define SSCG_EN(x)        (((x) & 0x1) << 5)
define AFC_ENB_E_V(x)        (((x) & 0x1) << 6)
define DCC_ENB_E_V(x)        (((x) & 0x1) << 7)
define EXTAFC(x)        (((x) & 0x1f) << 8)
define PLL_LOCKTIME(x)    ((x) & 0xffff)

/* CLK_SRC_CPU */

define MUX_APLL_SEL(x)         ((x) & 0x1)

define MUX_CORE_SEL(x)         (((x) & 0x1) << 16)

define MUX_HPM_SEL(x)          (((x) & 0x1) << 20)

define MUX_MPLL_USER_SEL_C(x)  (((x) & 0x1) << 24)

define MUX_STAT_CHANGING       0x100

/* CLK_MUX_STAT_CPU */

define APLL_SEL(x)             ((x) & 0x7)

define CORE_SEL(x)             (((x) & 0x7) << 16)

define HPM_SEL(x)              (((x) & 0x7) << 20)

define MPLL_USER_SEL_C(x)      (((x) & 0x7) << 24)

define MUX_STAT_CPU_CHANGING   (APLL_SEL(MUX_STAT_CHANGING) | \

CORE_SEL(MUX_STAT_CHANGING) | \
HPM_SEL(MUX_STAT_CHANGING) | \
MPLL_USER_SEL_C(MUX_STAT_CHANGING))

/* CLK_DIV_CPU0 */

define CORE_RATIO(x)           ((x) & 0x7)

define COREM0_RATIO(x)         (((x) & 0x7) << 4)

define COREM1_RATIO(x)         (((x) & 0x7) << 8)

define PERIPH_RATIO(x)         (((x) & 0x7) << 12)

define ATB_RATIO(x)            (((x) & 0x7) << 16)

define PCLK_DBG_RATIO(x)       (((x) & 0x7) << 20)

define APLL_RATIO(x)           (((x) & 0x7) << 24)

define CORE2_RATIO(x)          (((x) & 0x7) << 28)

/* CLK_DIV_STAT_CPU0 */

define DIV_CORE(x)             ((x) & 0x1)

define DIV_COREM0(x)           (((x) & 0x1) << 4)

define DIV_COREM1(x)           (((x) & 0x1) << 8)

define DIV_PERIPH(x)           (((x) & 0x1) << 12)

define DIV_ATB(x)              (((x) & 0x1) << 16)

define DIV_PCLK_DBG(x)         (((x) & 0x1) << 20)

define DIV_APLL(x)             (((x) & 0x1) << 24)

define DIV_CORE2(x)            (((x) & 0x1) << 28)

define DIV_STAT_CHANGING       0x1

define DIV_STAT_CPU0_CHANGING  (DIV_CORE(DIV_STAT_CHANGING) | \

DIV_COREM0(DIV_STAT_CHANGING) | \
DIV_COREM1(DIV_STAT_CHANGING) | \
DIV_PERIPH(DIV_STAT_CHANGING) | \
DIV_ATB(DIV_STAT_CHANGING) | \
DIV_PCLK_DBG(DIV_STAT_CHANGING) | \
DIV_APLL(DIV_STAT_CHANGING) | \
DIV_CORE2(DIV_STAT_CHANGING))

/* CLK_DIV_CPU1 */

define COPY_RATIO(x)           ((x) & 0x7)

define HPM_RATIO(x)            (((x) & 0x7) << 4)

define CORES_RATIO(x)          (((x) & 0x7) << 8)

/* CLK_DIV_STAT_CPU1 */

define DIV_COPY(x)             ((x) & 0x7)

define DIV_HPM(x)              (((x) & 0x1) << 4)

define DIV_CORES(x)            (((x) & 0x1) << 8)

define DIV_STAT_CPU1_CHANGING (DIV_COPY(DIV_STAT_CHANGING) | \

DIV_HPM(DIV_STAT_CHANGING) | \
DIV_CORES(DIV_STAT_CHANGING))

/* CLK_SRC_DMC */

define MUX_C2C_SEL(x)     ((x) & 0x1)

define MUX_DMC_BUS_SEL(x) (((x) & 0x1) << 4)

define MUX_DPHY_SEL(x)        (((x) & 0x1) << 8)

define MUX_MPLL_SEL(x)        (((x) & 0x1) << 12)

define MUX_PWI_SEL(x)     (((x) & 0xf) << 16)

define MUX_G2D_ACP0_SEL(x)    (((x) & 0x1) << 20)

define MUX_G2D_ACP1_SEL(x)    (((x) & 0x1) << 24)

define MUX_G2D_ACP_SEL(x) (((x) & 0x1) << 28)

/* CLK_MUX_STAT_DMC */

define C2C_SEL(x)     (((x)) & 0x7)

define DMC_BUS_SEL(x)     (((x) & 0x7) << 4)

define DPHY_SEL(x)        (((x) & 0x7) << 8)

define MPLL_SEL(x)        (((x) & 0x7) << 12)

/* #define PWI_SEL(x)      (((x) & 0xf) << 16)  - Reserved */

define G2D_ACP0_SEL(x)        (((x) & 0x7) << 20)

define G2D_ACP1_SEL(x)        (((x) & 0x7) << 24)

define G2D_ACP_SEL(x)     (((x) & 0x7) << 28)

define MUX_STAT_DMC_CHANGING  (C2C_SEL(MUX_STAT_CHANGING) | \

DMC_BUS_SEL(MUX_STAT_CHANGING) | \
DPHY_SEL(MUX_STAT_CHANGING) | \
MPLL_SEL(MUX_STAT_CHANGING) |\
G2D_ACP0_SEL(MUX_STAT_CHANGING) | \
G2D_ACP1_SEL(MUX_STAT_CHANGING) | \
G2D_ACP_SEL(MUX_STAT_CHANGING))

/* CLK_DIV_DMC0 */

define ACP_RATIO(x)       ((x) & 0x7)

define ACP_PCLK_RATIO(x)  (((x) & 0x7) << 4)

define DPHY_RATIO(x)      (((x) & 0x7) << 8)

define DMC_RATIO(x)       (((x) & 0x7) << 12)

define DMCD_RATIO(x)      (((x) & 0x7) << 16)

define DMCP_RATIO(x)      (((x) & 0x7) << 20)

/* CLK_DIV_STAT_DMC0 */

define DIV_ACP(x)     ((x) & 0x1)

define DIV_ACP_PCLK(x)        (((x) & 0x1) << 4)

define DIV_DPHY(x)        (((x) & 0x1) << 8)

define DIV_DMC(x)     (((x) & 0x1) << 12)

define DIV_DMCD(x)        (((x) & 0x1) << 16)

define DIV_DMCP(x)        (((x) & 0x1) << 20)

define DIV_STAT_DMC0_CHANGING (DIV_ACP(DIV_STAT_CHANGING) | \

DIV_ACP_PCLK(DIV_STAT_CHANGING) | \
DIV_DPHY(DIV_STAT_CHANGING) | \
DIV_DMC(DIV_STAT_CHANGING) | \
DIV_DMCD(DIV_STAT_CHANGING) | \
DIV_DMCP(DIV_STAT_CHANGING))

/* CLK_DIV_DMC1 */

define G2D_ACP_RATIO(x)   ((x) & 0xf)

define C2C_RATIO(x)       (((x) & 0x7) << 4)

define PWI_RATIO(x)       (((x) & 0xf) << 8)

define C2C_ACLK_RATIO(x)  (((x) & 0x7) << 12)

define DVSEM_RATIO(x)     (((x) & 0x7f) << 16)

define DPM_RATIO(x)       (((x) & 0x7f) << 24)

/* CLK_DIV_STAT_DMC1 */

define DIV_G2D_ACP(x)     ((x) & 0x1)

define DIV_C2C(x)     (((x) & 0x1) << 4)

define DIV_PWI(x)     (((x) & 0x1) << 8)

define DIV_C2C_ACLK(x)        (((x) & 0x1) << 12)

define DIV_DVSEM(x)       (((x) & 0x1) << 16)

define DIV_DPM(x)     (((x) & 0x1) << 24)

define DIV_STAT_DMC1_CHANGING (DIV_G2D_ACP(DIV_STAT_CHANGING) | \

DIV_C2C(DIV_STAT_CHANGING) | \
DIV_PWI(DIV_STAT_CHANGING) | \
DIV_C2C_ACLK(DIV_STAT_CHANGING) | \
DIV_DVSEM(DIV_STAT_CHANGING) | \
DIV_DPM(DIV_STAT_CHANGING))

/* CLK_DIV_TOP */

define    ACLK400MCUISP_RATIO(x)    (((x) & 0x7) << 24)

define    ACLK266GPS_RATIO(x)   (((x) & 0x7) << 20)

define    ONENAND_RATIO(x)    (((x) & 0x7) << 16)

define    ACLK133RATIO(x)   (((x) & 0x7) << 12)

define ACLK160RATIO(x)  (((x) & 0x7) << 8)

define ACLK100RATIO(x)  (((x) & 0xf) << 4)

define ACLK200RATIO(x)  ((x) & 0x7)

define DIV_STAT_TOP_CHANGING  (ACLK400MCUISP_RATIO(DIV_STAT_CHANGING) | \

ACLK_266_GPS_RATIO(DIV_STAT_CHANGING) | \
ONENAND_RATIO(DIV_STAT_CHANGING) | \
ACLK_133_RATIO(DIV_STAT_CHANGING) | \
ACLK_160_RATIO(DIV_STAT_CHANGING) | \
ACLK_100_RATIO(DIV_STAT_CHANGING) | \
ACLK_200_RATIO(DIV_STAT_CHANGING))

/* CLK_SRC_TOP0 */

define MUX_ONENAND_SEL(x)     (((x) & 0x1) << 28)

define MUX_ACLK133SEL(x)        (((x) & 0x1) << 24)

define MUX_ACLK160SEL(x)        (((x) & 0x1) << 20)

define MUX_ACLK100SEL(x)        (((x) & 0x1) << 16)

define MUX_ACLK200SEL(x)        (((x) & 0x1) << 12)

define MUX_VPLL_SEL(x)        (((x) & 0x1) << 8)

define MUX_EPLL_SEL(x)        (((x) & 0x1) << 4)

define MUX_ONENAND1SEL(x)   ((x) & 0x1)

/* CLK_MUX_STAT_TOP */

define ONENAND_SEL(x)     (((x) & 0x3) << 28)

define ACLK133SEL(x)        (((x) & 0x3) << 24)

define ACLK160SEL(x)        (((x) & 0x3) << 20)

define ACLK100SEL(x)        (((x) & 0x3) << 16)

define ACLK200SEL(x)        (((x) & 0x3) << 12)

define VPLL_SEL(x)        (((x) & 0x3) << 8)

define EPLL_SEL(x)        (((x) & 0x3) << 4)

define ONENAND1SEL(x)   ((x) & 0x3)

/* CLK_SRC_TOP1 */

define MUX_ACLK400MCUISP_SUB_SEL(x)     (((x) & 0x1) << 24)

define MUX_ACLK200SUB_SEL(x)        (((x) & 0x1) << 20)

define MUX_ACLK266GPS_SUB_SEL(x)        (((x) & 0x1) << 16)

define MUX_MPLL_USER_SEL_T(x)     (((x) & 0x1) << 12)

define MUX_ACLK400MCUISP_SEL(x)     (((x) & 0x1) << 8)

define MUX_ACLK266GPS_SEL(x)        (((x) & 0x1) << 4)

/* CLK_MUX_STAT_TOP1 */

define ACLK400MCUISP_SUB_SEL(x)     (((x) & 0x3) << 24)

define ACLK200SUB_SEL(x)        (((x) & 0x3) << 20)

define ACLK266GPS_SUB_SEL(x)        (((x) & 0x3) << 16)

define MPLL_USER_SEL_T(x)     (((x) & 0x3) << 12)

define ACLK400MCUISP_SEL(x)     (((x) & 0x3) << 8)

define ACLK266GPS_SEL(x)        (((x) & 0x3) << 4)


/CLK_DIV_LEFTBUS/

define GDL_RATIO(x)   ((x) & 0x7)

define GPL_RATIO(x)   (((x) & 0x7) << 4)

define DIV_STAT_LEFTBUS_CHANGING  (GDL_RATIO(DIV_STAT_CHANGING) | \

GPL_RATIO(DIV_STAT_CHANGING) )

/* CLK_SRC_LEFTBUS */

define MUX_MPLL_USER_SEL_L(x)     (((x) & 0x1) << 4)

define MUX_GDL_SEL(x)     ((x) & 0x1)

/* CLK_MUX_STAT_LEFTBUS */

define MPLL_USER_SEL_L(x)     (((x) & 0x3) << 4)

define GDL_SEL(x)     ((x) & 0x3)

/CLK_DIV_RIGHTBUS/

define GDR_RATIO(x)   ((x) & 0x7)

define GPR_RATIO(x)   (((x) & 0x7) << 4)

define DIV_STAT_RIGHTBUS_CHANGING (GDR_RATIO(DIV_STAT_CHANGING) | \

GPR_RATIO(DIV_STAT_CHANGING) )

/* CLK_SRC_RIGHTBUS */

define MUX_MPLL_USER_SEL_R(x)     (((x) & 0x1) << 4)

define MUX_GDR_SEL(x)     ((x) & 0x1)

/* CLK_MUX_STAT_RIGHTBUS */

define MPLL_USER_SEL_R(x)     (((x) & 0x3) << 4)

define GDR_SEL(x)     ((x) & 0x3)



/* Set CLK_SRC_PERIL0 */

define UART4_SEL(x)       (((x) & 0xf) << 16)

define UART3_SEL(x)       (((x) & 0xf) << 12)

define UART2_SEL(x)       (((x) & 0xf) << 8)

define UART1_SEL(x)       (((x) & 0xf) << 4)

define UART0_SEL(x)       ((x) & 0xf)

/* Set CLK_DIV_PERIL0 */

define UART4_RATIO(x)     (((x) & 0xf) << 16)

define UART3_RATIO(x)     (((x) & 0xf) << 12)

define UART2_RATIO(x)     (((x) & 0xf) << 8)

define UART1_RATIO(x)     (((x) & 0xf) << 4)

define UART0_RATIO(x)     ((x) & 0xf)

/* Set CLK_DIV_STAT_PERIL0 */

define DIV_UART4(x)       (((x) & 0x1) << 16)

define DIV_UART3(x)       (((x) & 0x1) << 12)

define DIV_UART2(x)       (((x) & 0x1) << 8)

define DIV_UART1(x)       (((x) & 0x1) << 4)

define DIV_UART0(x)       ((x) & 0x1)

define DIV_STAT_PERIL0_CHANGING   (DIV_UART4(DIV_STAT_CHANGING) | \

DIV_UART3(DIV_STAT_CHANGING) | \
DIV_UART2(DIV_STAT_CHANGING) | \
DIV_UART1(DIV_STAT_CHANGING) | \
DIV_UART0(DIV_STAT_CHANGING))

/* CLK_DIV_FSYS1 */

define MMC0_RATIO(x)      ((x) & 0xf)

define MMC0_PRE_RATIO(x)  (((x) & 0xff) << 8)

define MMC1_RATIO(x)      (((x) & 0xf) << 16)

define MMC1_PRE_RATIO(x)  (((x) & 0xff) << 24)

/* CLK_DIV_STAT_FSYS1 */

define DIV_MMC0(x)        ((x) & 1)

define DIV_MMC0_PRE(x)        (((x) & 1) << 8)

define DIV_MMC1(x)        (((x) & 1) << 16)

define DIV_MMC1_PRE(x)        (((x) & 1) << 24)

define DIV_STAT_FSYS1_CHANGING        (DIV_MMC0(DIV_STAT_CHANGING) | \

DIV_MMC0_PRE(DIV_STAT_CHANGING) | \
DIV_MMC1(DIV_STAT_CHANGING) | \
DIV_MMC1_PRE(DIV_STAT_CHANGING))

/* CLK_DIV_FSYS2 */

define MMC2_RATIO(x)      ((x) & 0xf)

define MMC2_PRE_RATIO(x)  (((x) & 0xff) << 8)

define MMC3_RATIO(x)      (((x) & 0xf) << 16)

define MMC3_PRE_RATIO(x)  (((x) & 0xff) << 24)

/* CLK_DIV_STAT_FSYS2 */

define DIV_MMC2(x)        ((x) & 0x1)

define DIV_MMC2_PRE(x)        (((x) & 0x1) << 8)

define DIV_MMC3(x)        (((x) & 0x1) << 16)

define DIV_MMC3_PRE(x)        (((x) & 0x1) << 24)

define DIV_STAT_FSYS2_CHANGING        (DIV_MMC2(DIV_STAT_CHANGING) | \

DIV_MMC2_PRE(DIV_STAT_CHANGING) | \
DIV_MMC3(DIV_STAT_CHANGING) | \
DIV_MMC3_PRE(DIV_STAT_CHANGING))

/* CLK_DIV_FSYS3 */

define MMC4_RATIO(x)      ((x) & 0x7)

define MMC4_PRE_RATIO(x)  (((x) & 0xff) << 8)

/* CLK_DIV_STAT_FSYS3 */

define DIV_MMC4(x)        ((x) & 0x1)

define DIV_MMC4_PRE(x)        (((x) & 0x1) << 8)

define DIV_STAT_FSYS3_CHANGING        (DIV_MMC4(DIV_STAT_CHANGING) | \

DIV_MMC4_PRE(DIV_STAT_CHANGING))

#endif 
  • 文件修改完毕,开始编译。
写一个脚本文件,自动编译:

root@ubuntu:/opt/u-boot-2017.03# vim auto_run.sh 

1 #!/bin/bash

2 

3 echo "Clean Configuration File..."

4 make distclean

5 

6 echo "Clean Obj..."

7 make clean

8 

9 echo "Load Configuration File..."

10 make tiny4412_defconfig

11 

12 echo "make..."

13 make CROSS_COMPILE=arm-linux-
  • 提示错误
错误:
*** Your dtc is too old, please upgrade to dtc 1.4 or newer
Makefile:1385: recipe for target 'checkdtc' failed
解决:
root@ubuntu:/opt/u-boot-2017.03/doc# apt-cache search dtc
device-tree-compiler - Device Tree Compiler for Flat Device Trees
root@ubuntu:/opt/u-boot-2017.03/doc# apt-get install device-tree-compiler

错误:
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_EXYNOS4412
CONFIG_TINY4412

Please add these via Kconfig instead. Find a suitable Kconfig
file and add a 'config' or 'menuconfig' option.
Makefile:853: recipe for target 'all' failed
make: *** [all] Error 1
解决:
root@ubuntu:/opt/u-boot-2017.03# vim Makefile
839 cfg: u-boot.cfg
840 
841 quiet_cmd_cfgcheck = CFGCHK  $2
842 cmd_cfgcheck =
843 #cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \
844 #       $(srctree)/scripts/config_whitelist.txt $(srctree)
845 
846 all:        $(ALL-y)
这句话只用于检查配置,可以屏蔽掉
  • 修改文件 ./sd_fuse/tiny4412/sd_fusing.sh
73 #<BL2 fusing>
74 echo "---------------------------------------"
75 echo "BL2 fusing"
76 #dd iflag=dsync oflag=dsync if=./bl2.bin of=$1 seek=$bl2_position
77 dd iflag=dsync oflag=dsync if=../../spl/tiny4412-spl.bin of=$1 seek=$bl2_position
  • 写一个烧录脚本 auto_fuse.sh
root@ubuntu:/opt/u-boot-2017.03/sd_fuse/tiny4412# vim auto_fuse.sh 

1 #!/bin/bash

2 

3 EXEC="sd_fusing.sh"

4 SD_PATH="/dev/sdb"

5 FUSE_PATH="./${EXEC}"

6 

7 if [ -e ${FUSE_PATH} ]

8 then

9     if [ -e ${SD_PATH} ]

10     then

11         ${FUSE_PATH} ${SD_PATH}

12     else

13         echo "Please Insert SD!"

14     fi

15 else

16     echo "File Not Exist!"

17 fi
  • 编译成功,烧录到开发板!

    root@ubuntu:/opt/U-BOOT-Tiny4412# cd sd_fuse/tiny4412/
    root@ubuntu:/opt/U-BOOT-Tiny4412/sd_fuse/tiny4412# ./auto_fuse.sh 

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