扬创utu2440板子uboot1.3.4(带DM9000A网卡)的移植详细步骤
注明:本篇文章，绝大部分都是来源与tekkaman的移植U－Boot.1.3.1到S3C244和S3C2410，原文链接http://blog.chinaunix.net/u1/34474/showart.php?id=487416，只是因为uboot1.3.4与uboot1.3.1有部分不同，结合自己的调试经历，写下此篇，希望新手不会像我这样曲折。
一、在U-Boot中建立自己的开发板类型，并测试编译。
我为开发板取名叫: utu2440
1 进入U-Boot目录，修改Makefile
[root@localhost u-boot-1.3.4]$ vim Makefile
#为utu2440建立编译项
smdk2410_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 NULL s3c24x0
utu2440_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t utu2440 NULL s3c24x0
各项的意思如下:
arm: CPU的架构(ARCH)
arm920t: CPU的类型(CPU)，其对应于cpu/arm920t子目录。
utu2440: 开发板的型号(BOARD)，对应于board/utu2440/目录,我将smdk2410覆盖了
NULL: 开发者/或经销商(vender)。
s3c24x0: 片上系统(SOC)。
设置环境变量
[root@localhost u-boot-1.3.4]# vim /root/.bash_profile
在PATH一行后添加/usr/local/arm/3.3.2/bin:PATH
2 在/board子目录中建立自己的开发板utu2440目录
[root@localhost u-boot-1.3.4]$ cd board
[root@localhost board]# cp -raf smdk2410/ utu2440
[root@localhost board]# cd utu2440
[root@localhost utu2440]# mv smdk2410.c utu2440.c
还要记得修改自己的开发板tekkaman2440目录下的Makefile文件，不然编译时会出错：
[root@localhost utu2440]# vim Makefile
COBJS := utu2440.o flash.o
3 在include/configs/中建立配置头文件
[root@localhost u-boot-1.3.4]＃ cp include/configs/smdk2410.h include/configs/utu2440.h
4 测试编译能否成功
1）配置
[root@localhost u-boot-1.3.4]＃ make tekkaman2440_config
Configuring for utu2440 board...
注：
(1) 如果出现：
[root@localhost u-boot-1.3.4]# make utu2440_config
Makefile:2497: *** 遗漏分隔符 (您的意思是用 TAB 代替 8 个空格？)。 停止。
请在U－boot的根目录下的Makefile的
@$(MKCONFIG) $(@:_config=) arm arm920t utu2440 NULL s3c24x0)
前加上“Tab”键
2）测试编译
[root@localhost u-boot-1.3.4]$make
0、修改makefile文件
__LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
改为：
__LIBS := $(subst $(obj),,$(LIBBOARD)) $(subst $(obj),,$(LIBS))
二、进行移植，修改uboot代码
1、修改/cpu/arm920t/start.S
#include <config.h>
#include <version.h>
#if defined(CONFIG_AT91RM9200DK)
#include <status_led.h> /*这是针对AT91RM9200DK开发板的。
#endif
......
/*
* the actual start code
*/
start_code:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
#if defined(CONFIG_AT91RM9200DK)
bl coloured_LED_init
bl red_LED_on
#endif
(0)修改寄存器地址定义
#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)|| defined(CONFIG_S3C2440)
/* turn off the watchdog */
#if defined(CONFIG_S3C2400)
#define pWTCON 0x15300000
#define INTMSK 0x14400008 /* Interupt-Controller base addresses */
#define CLKDIVN 0x14800014 /* clock divisor register */
#else
#define pWTCON 0x53000000
#define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
#define INTSUBMSK 0x4A00001C
#define CLKDIVN 0x4C000014 /* clock divisor register */
#define CLK_CTL_BASE 0x4C000000
#define MPLLCON 4 /*MPLLCON的偏移地址*/
#endif
......
(1)修改中断禁止部分
#if defined(CONFIG_S3C2410)
ldr r1, =0x7ff /*根据2410芯片手册，INTSUBMSK有11位可用，
vivi也是0x7ff，U－Boot一直没改过来。*/
ldr r0, =INTSUBMSK
str r1, [r0]
#endif
#if defined(CONFIG_S3C2440)
ldr r1, =0x7fff /*根据2440芯片手册，INTSUBMSK有15位可用*/
ldr r0, =INTSUBMSK
str r1, [r0]
#endif
(2)修改时钟设置（2440的主频为405MHz。）
# if defined(CONFIG_S3C2440)
/* FCLK:HCLK:PCLK = 1:4:8 */
ldr r0, =CLKDIVN
mov r1, #5
str r1, [r0]
mrc p15, 0, r1, c1, c0, 0 /*read ctrl register */
orr r1, r1, #0xc0000000 /*Asynchronous */
mcr p15, 0, r1, c1, c0, 0 /*write ctrl register*/
/*now, CPU clock is 405.00 Mhz 这边直接copy了vivi的部分代码*/
mov r1, #CLK_CTL_BASE
@ldr r2, mpll_value @ clock default
ldr r2, =0x7f021 @mpll_value_USER
str r2, [r1, #MPLLCON]
#else
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
mrc p15, 0, r1, c1, c0, 0 /*read ctrl register*/
orr r1, r1, #0xc0000000 /*Asynchronous */
mcr p15, 0, r1, c1, c0, 0 /*write ctrl register*/
/*now, CPU clock is 202.8 Mhz */
mov r1, #CLK_CTL_BASE
mov r2, #MDIV_200 /* mpll_200mhz */
add r2, r2, #PSDIV_200 /* mpll_200mhz */
str r2, [r1, #0x04]
# endif
#endif /* CONFIG_S3C2400 || CONFIG_S3C2410|| CONFIG_S3C2440 */
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
mov r1, #GPIO_CTL_BASE
add r1, r1, #oGPIO_F
ldr r2,=0x55aa
str r2, [r1, #oGPIO_CON]
mov r2, #0xff
str r2, [r1, #oGPIO_UP]
mov r2, #0x0
str r2, [r1, #oGPIO_DAT] /*时钟以及内存配置配置好后灯全亮*/
(3)将从Flash启动改成从NAND Flash启动。
注释掉以下U－Boot的重定向语句
#ifdef CONFIG_AT91RM9200
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address*/
copy_loop:
ldmia {r3-r10} /* copy from source address [r0] */
stmia {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
#endif
然后copy vivi中从nand启动的代码
#ifdef CONFIG_S3C2440_NAND_BOOT
@ reset NAND
mov r1, #NAND_CTL_BASE
ldr r2, =( (7<<12)|(7<<8)|(7<<4)|(0<<0) )
str r2, [r1, #oNFCONF]
ldr r2, [r1, #oNFCONF]
ldr r2, =( (1<<4)|(0<<1)|(1<<0) ) @ Active low CE Control
str r2, [r1, #oNFCONT]
ldr r2, [r1, #oNFCONT]
ldr r2, =(0x6) @ RnB Clear
str r2, [r1, #oNFSTAT]
ldr r2, [r1, #oNFSTAT]
mov r2, #0xff @ RESET command
strb r2, [r1, #oNFCMD]
mov r3, #0 @ wait
1:
add r3, r3, #0x1
cmp r3, #0xa
blt 1
2:
ldr r2, [r1, #oNFSTAT] @ wait ready
tst r2, #0x4 @When RnB low to high transition is occurred, this value set
beq 2
ldr r2, [r1, #oNFCONT]
orr r2, r2, #0x2 @ Flash Memory Chip Disable
str r2, [r1, #oNFCONT]
@ get read to call C s (for nand_read())
ldr sp, DW_STACK_START @ setup stack pointer
mov fp, #0 @ no previous , so fp=0
@ copy U-Boot to RAM
ldr r0, =TEXT_BASE
mov r1, #0x0
mov r2, #0x30000
bl nand_read_ll
tst r0, #0x0
beq ok_nand_read
bad_nand_read:
loop2: b loop2 @ infinite loop
ok_nand_read:
@ verify
mov r0, #0
ldr r1, =TEXT_BASE
mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes
go_next:
ldr r3, [r0], #4
ldr r4, [r1], #4
teq r3, r4
bne notmatch
subs r2, r2, #4
beq stack_setup
bne go_next
notmatch:
loop3: b loop3 @ infinite loop
#endif @ CONFIG_S3C2440_NAND_BOOT
#ifdef CONFIG_S3C2410_NAND_BOOT
@ reset NAND
mov r1, #NAND_CTL_BASE
ldr r2, =0xf830 @ initial value
str r2, [r1, #oNFCONF]
ldr r2, [r1, #oNFCONF]
bic r2, r2, #0x800 @ enable chip
str r2, [r1, #oNFCONF]
mov r2, #0xff @ RESET command
strb r2, [r1, #oNFCMD]
mov r3, #0 @ wait
1:
add r3, r3, #0x1
cmp r3, #0xa
blt nand1
2:
ldr r2, [r1, #oNFSTAT] @ wait ready
tst r2, #0x1
beq nand2
ldr r2, [r1, #oNFCONF]
orr r2, r2, #0x800 @ disable chip
str r2, [r1, #oNFCONF]
@ get read to call C s (for nand_read())
ldr sp, DW_STACK_START @ setup stack pointer
mov fp, #0 @ no previous , so fp=0
@ copy U-Boot to RAM
ldr r0, =TEXT_BASE
mov r1, #0x0
mov r2, #0x30000 //还不知道为啥要由20000改成30000
bl nand_read_ll
tst r0, #0x0
beq ok_nand_read
bad_nand_read:
loop2: b loop2 @ infinite loop
ok_nand_read:
@ verify
mov r0, #0
ldr r1, =TEXT_BASE
mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes
go_next:
ldr r3, [r0], #4
ldr r4, [r1], #4
teq r3, r4
bne notmatch
subs r2, r2, #4
beq stack_setup
bne go_next
notmatch:
loop3: b loop3 @ infinite loop
#endif @ CONFIG_S3C2410_NAND_BOOT
在“ldr pc, _start_armboot”之前加入：
mov r1, #GPIO_CTL_BASE
add r1, r1, #oGPIO_F
mov r2, #0xc0
str r2, [r1, #oGPIO_DAT]
在 “ _start_armboot: .word start_armboot ” 后加入：
.align 2
DW_STACK_START: .word STACK_BASE+STACK_SIZE-4
2 在board/utu2440加入NAND Flash读函数文件，拷贝vivi中的nand_read.c文件到board/utu2440/即可不需要作任何改动：
#include <config.h>
#define __REGb(x) (*(volatile unsigned char *)(x))
#define __REGi(x) (*(volatile unsigned int *)(x))
#define NF_BASE 0x4e000000
# if defined(CONFIG_S3C2440)
#define NFCONF __REGi(NF_BASE + 0x0)
#define NFCONT __REGi(NF_BASE + 0x4)
#define NFCMD __REGb(NF_BASE + 0x8)
#define NFADDR __REGb(NF_BASE + 0xC)
#define NFDATA __REGb(NF_BASE + 0x10)
#define NFSTAT __REGb(NF_BASE + 0x20)
//#define GPDAT __REGi(GPIO_CTL_BASE+oGPIO_F+oGPIO_DAT)
#define NAND_CHIP_ENABLE (NFCONT &= ~(1<<1))
#define NAND_CHIP_DISABLE (NFCONT |= (1<<1))
#define NAND_CLEAR_RB (NFSTAT |= (1<<2))
#define NAND_DETECT_RB { while(! (NFSTAT&(1<<2)) );}
#define BUSY 4
inline void wait_idle(void) {
while(!(NFSTAT & BUSY));
NFSTAT |= BUSY;
}
#define NAND_SECTOR_SIZE 512
#define NAND_BLOCK_MASK (NAND_SECTOR_SIZE - 1)
/* low level nand read */
int
nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
{
int i, j;
if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {
return -1; /* invalid alignment */
}
NAND_CHIP_ENABLE;
for(i=start_addr; i < (start_addr + size);) {
/* READ0 */
NAND_CLEAR_RB;
NFCMD = 0;
/* Write Address */
NFADDR = i & 0xff;
NFADDR = (i >> 9) & 0xff;
NFADDR = (i >> 17) & 0xff;
NFADDR = (i >> 25) & 0xff;
NAND_DETECT_RB;
for(j=0; j < NAND_SECTOR_SIZE; j++, i++) {
*buf = (NFDATA & 0xff);
buf++;
}
}
NAND_CHIP_DISABLE;
return 0;
}
# endif
# if defined(CONFIG_S3C2410)
#define NFCONF __REGi(NF_BASE + 0x0)
#define NFCMD __REGb(NF_BASE + 0x4)
#define NFADDR __REGb(NF_BASE + 0x8)
#define NFDATA __REGb(NF_BASE + 0xc)
#define NFSTAT __REGb(NF_BASE + 0x10)
#define BUSY 1
inline void wait_idle(void) {
int i;
while(!(NFSTAT & BUSY))
for(i=0; i<10; i++);
}
/* low level nand read */
int
nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
{
int i, j;
if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {
return -1; /* invalid alignment */
}
/* chip Enable */
NFCONF &= ~0x800;
for(i=0; i<10; i++);
for(i=start_addr; i < (start_addr + size);) {
/* READ0 */
NFCMD = 0;
/* Write Address */
NFADDR = i & 0xff;
NFADDR = (i >> 9) & 0xff;
NFADDR = (i >> 17) & 0xff;
NFADDR = (i >> 25) & 0xff;
wait_idle();
for(j=0; j < NAND_SECTOR_SIZE; j++, i++) {
*buf = (NFDATA & 0xff);
buf++;
}
}
/* chip Disable */
NFCONF |= 0x800; /* chip disable */
return 0;
}
# endif
3 修改board/utu2440/Makefile文件
......
OBJS := utu2440.o nand_read.o flash.o
......
4 修改include/configs/utu2440.h文件，添加如下内容：
......
/*
* Nandflash Boot
*/
#define STACK_BASE 0x33f00000
#define STACK_SIZE 0x8000
//#define UBOOT_RAM_BASE 0x33f80000
/* NAND Flash Controller */
#define NAND_CTL_BASE 0x4E000000
#define bINT_CTL(Nb) __REG(INT_CTL_BASE + (Nb))
/* Offset */
#define oNFCONF 0x00
# if defined(CONFIG_S3C2440)
#define CONFIG_S3C2440_NAND_BOOT 1
/* Offset */
#define oNFCONT 0x04
#define oNFCMD 0x08
#define oNFADDR 0x0c
#define oNFDATA 0x10
#define oNFSTAT 0x20
#define oNFECC 0x2c
#define rNFCONF (*(volatile unsigned int *)0x4e000000)
#define rNFCONT (*(volatile unsigned int *)0x4e000004)
#define rNFCMD (*(volatile unsigned char *)0x4e000008)
#define rNFADDR (*(volatile unsigned char *)0x4e00000c)
#define rNFDATA (*(volatile unsigned char *)0x4e000010)
#define rNFSTAT (*(volatile unsigned int *)0x4e000020)
#define rNFECC (*(volatile unsigned int *)0x4e00002c)
/* GPIO */
#define GPIO_CTL_BASE 0x56000000
#define oGPIO_F 0x50
#define oGPIO_CON 0x0 /* R/W, Configures the pins of the port */
#define oGPIO_DAT 0x4 /* R/W, Data register for port */
#define oGPIO_UP 0x8 /* R/W, Pull-up disable register */
#endif
#endif /* __CONFIG_H */
5 修改board/utu2440/lowlevel_init.S文件
依照开发板的内存区的配置情况, 修改board/utu2440/lowlevel_init.S文件，我利用友善之臂提供的vivi源码里的信息做了如下更改:
......
#define B1_BWSCON (DW16)
#define B2_BWSCON (DW16)
#define B3_BWSCON (DW16 + WAIT + UBLB)
#define B4_BWSCON (DW16)
#define B5_BWSCON (DW16)
#define B6_BWSCON (DW32)
#define B7_BWSCON (DW32)
......
#define B2_Tacs 0x0
#define B2_Tcos 0x0
#define B2_Tacc 0x7
#define B2_Tcoh 0x0
#define B2_Tah 0x0
#define B2_Tacp 0x0
#define B2_PMC 0x0
#endif
……
/* REFRESH parameter */
#define REFEN 0x1 /* Refresh enable */
#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
#define Trc 0x3 /* 7clk */
#define Tchr 0x2 /* 3clk */
# if defined(CONFIG_S3C2440)
#define Trp 0x2 /* 4clk */
#define REFCNT 1265
#endif
/**************************************/
_TEXT_BASE:
.word TEXT_BASE
.globl lowlevel_init
lowlevel_init:
/* memory control configuration */
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
//ldr r0, =SMRDATA
adrl r0, SMRDATA //edited by yaoyi 20090312
ldr r1, _TEXT_BASE
// sub r0, r0, r1
ldr r1, =BWSCON /* Bus Width Status Controller */
add r2, r0, #13*4
0:
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne 0b
6 修改/board/utu2440/utu2440.c
修改其对GPIO和PLL的配置(请参阅开发板的硬件说明和芯片手册)：
......
#define FCLK_SPEED 1
#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
#define M_MDIV 0xC3
#define M_PDIV 0x4
#define M_SDIV 0x1
#elif FCLK_SPEED==1
#if defined(CONFIG_S3C2410)
/* Fout = 202.8MHz */
#define M_MDIV 0xA1
#define M_PDIV 0x3
#define M_SDIV 0x1
#endif
#if defined(CONFIG_S3C2440)
/* Fout = 405MHz */
#define M_MDIV 0x7f
#define M_PDIV 0x2
#define M_SDIV 0x1
#endif
#define USB_CLOCK 1
#if USB_CLOCK==0
#define U_M_MDIV 0xA1
#define U_M_PDIV 0x3
#define U_M_SDIV 0x1
#elif USB_CLOCK==1
#if defined(CONFIG_S3C2410)
#define U_M_MDIV 0x48
#define U_M_PDIV 0x3
#endif
#if defined(CONFIG_S3C2440)
#define U_M_MDIV 0x38
#define U_M_PDIV 0x2
#endif
#define U_M_SDIV 0x2
#endif
......
int board_init (void)
{
......
gpio->GPFDAT=0xaf; //板子初始化完后，亮灯
......
}
7 为了实现NAND Flash的读写，再次修改/include/configs/utu2440.h
......
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
//#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ //edited by yaoyi 20090312
//#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */ //edited by yaoyi 20090312
#define CONFIG_utu2440 1
#define CONFIG_S3C2440 1
.......
#include <config_cmd_default.h>
#define CONFIG_CMD_ELF
#define CONFIG_CMD_DATE
#define CONFIG_CMD_CACHE
//edited by yaoyi 20090312
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_CMD_NAND
#define CONFIG_CMD_REGINFO
//edited by yaoyi 20090312
#define CONFIG_BOOTDELAY 3
/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.1.110
#define CONFIG_SERVERIP 192.168.1.1
/*#define CONFIG_BOOTFILE "elinos-lart" */
/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
#endif
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "utu2440 # " /* Monitor Command Prompt */
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
//#define CFG_LOAD_ADDR 0x33000000 /* default load address */
#define CFG_LOAD_ADDR 0x30008000 //edited by yaoyi 20090312
/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
/* it to wrap 100 times (total 1562500) to get 1 sec. */
#define CFG_HZ 1562500
/* valid baudrates */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*-----------------------------------------------------------------------
* Stack sizes
*
* The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
#endif
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
#define CFG_FLASH_BASE PHYS_FLASH_1
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
#if 0
#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
#endif
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#ifdef CONFIG_AMD_LV800
#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
#endif
#ifdef CONFIG_AMD_LV400
#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
#endif
/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
//#define CFG_ENV_IS_IN_FLASH 1 //edited by yaoyi 20090312
#define CFG_ENV_IS_IN_NAND 1
#define CFG_ENV_OFFSET 0x30000
#define CFG_NAND_LEGACY
#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
//edited by yaoyi 20090312
#if defined(CONFIG_CMD_NAND)
#define CFG_NAND_BASE 0x4E000000 //edited by yaoyi 20090312
#define CFG_MAX_NAND_DEVICE 1
#define SECTORSIZE 512
/* 1页的大小 */
#define NAND_SECTOR_SIZE SECTORSIZE
#define NAND_BLOCK_MASK 511
/* 页掩码 */
#define ADDR_COLUMN 1
/* 一个字节的Column地址 */
#define ADDR_PAGE 3
/* 3字节的页块地址!!!!!*/
#define ADDR_COLUMN_PAGE 4
/* 总共4字节的页块地址!!!!! */
#define NAND_ChipID_UNKNOWN 0x00
/* 未知芯片的ID号 */
#define NAND_MAX_FLOORS 1
#define NAND_MAX_CHIPS 1
/* Nand Flash命令层底层接口函数 */
#define WRITE_NAND_ADDRESS(d, adr) {rNFADDR = d;}
#define WRITE_NAND(d, adr) {rNFDATA = d;}
#define READ_NAND(adr) (rNFDATA)
#define NAND_WAIT_READY(nand) {while(!(rNFSTAT&(1<<0)));}
#define WRITE_NAND_COMMAND(d, adr) {rNFCMD = d;}
#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d)
# if defined(CONFIG_S3C2440)
#define NAND_DISABLE_CE(nand) {rNFCONT |= (1<<1);}
#define NAND_ENABLE_CE(nand) {rNFCONT &= ~(1<<1);}
#endif
# if defined(CONFIG_S3C2410)
#define NAND_DISABLE_CE(nand) {rNFCONF |= (1<<11);}
#define NAND_ENABLE_CE(nand) {rNFCONF &= ~(1<<11);}
#endif
/* the following functions are NOP's because S3C24X0 handles this in hardware */
#define NAND_CTL_CLRALE(nandptr)
#define NAND_CTL_SETALE(nandptr)
#define NAND_CTL_CLRCLE(nandptr)
#define NAND_CTL_SETCLE(nandptr)
/* 允许Nand Flash写校验 */
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
/* NANDFlash Boot */
#define STACK_BASE 0x33f00000
#define STACK_SIZE 0x8000
/* NAND Flash Controller */
#define NAND_CTL_BASE 0x4E000000
#define bINT_CTL(Nb) __REG(INT_CTL_BASE + (Nb))
/* Offset */
#define oNFCONF 0x00
# if defined(CONFIG_S3C2440)
#define CONFIG_S3C2440_NAND_BOOT 1
/* Offset */
#define oNFCONT 0x04
#define oNFCMD 0x08
#define oNFADDR 0x0c
#define oNFDATA 0x10
#define oNFSTAT 0x20
#define oNFECC 0x2c
#define rNFCONF (*(volatile unsigned int *)0x4e000000)
#define rNFCONT (*(volatile unsigned int *)0x4e000004)
#define rNFCMD (*(volatile unsigned char *)0x4e000008)
#define rNFADDR (*(volatile unsigned char *)0x4e00000c)
#define rNFDATA (*(volatile unsigned char *)0x4e000010)
#define rNFSTAT (*(volatile unsigned int *)0x4e000020)
#define rNFECC (*(volatile unsigned int *)0x4e00002c)
#define GPIO_CTL_BASE 0x56000000
#define oGPIO_F 0x50
#define oGPIO_CON 0x0 /* R/W, Configures the pins of the port */
#define oGPIO_DAT 0x4 /* R/W, Data register for port */
#define oGPIO_UP 0x8 /* R/W, Pull-up disable register */
#endif //edited by yaoyi 20090312
#endif
#endif /* __CONFIG_H */
8、在个文件中添加“CONFIG_S3C2440”，使得原来s3c2410的代码可以编译进来。
（1）/include/common.h文件的第474行：
#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X) ||defined(CONFIG_S3C2440)
（2）/include/s3c24x0.h文件的第85、95、99、110、148、404行：
将“#ifdef CONFIG_S3C2410”改为
#if defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
顺便在其中加入2440 的NAND FLASH 寄存器定义（第160行附近）和CAMDIVN定义（第128行附近）：
......
typedef struct {
S3C24X0_REG32 LOCKTIME;
S3C24X0_REG32 MPLLCON;
S3C24X0_REG32 UPLLCON;
S3C24X0_REG32 CLKCON;
S3C24X0_REG32 CLKSLOW;
S3C24X0_REG32 CLKDIVN;
#if defined (CONFIG_S3C2440)
S3C24X0_REG32 CAMDIVN;
#endif
} /*__attribute__((__packed__))*/ S3C24X0_CLOCK_POWER;
......
#if defined(CONFIG_S3C2410)
/* NAND FLASH (see S3C2410 manual chapter 6) */
typedef struct {
S3C24X0_REG32 NFCONF;
S3C24X0_REG32 NFCMD;
S3C24X0_REG32 NFADDR;
S3C24X0_REG32 NFDATA;
S3C24X0_REG32 NFSTAT;
S3C24X0_REG32 NFECC;
} /*__attribute__((__packed__))*/ S3C2410_NAND;
#endif
#if defined (CONFIG_S3C2440)
/* NAND FLASH (see S3C2440 manual chapter 6) */
typedef struct {
S3C24X0_REG32 NFCONF;
S3C24X0_REG32 NFCONT;
S3C24X0_REG32 NFCMD;
S3C24X0_REG32 NFADDR;
S3C24X0_REG32 NFDATA;
S3C24X0_REG32 NFMECC0;
S3C24X0_REG32 NFMECC1;
S3C24X0_REG32 NFSECC;
S3C24X0_REG32 NFSTAT;
S3C24X0_REG32 NFESTAT0;
S3C24X0_REG32 NFESTAT1;
S3C24X0_REG32 NFECC;
} /*__attribute__((__packed__))*/ S3C2440_NAND;
#endif
（3）/cpu/arm920t/s3c24x0/interrupts.c文件的第33行：
#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) ||defined (CONFIG_S3C2440)
第38行：
#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
在个文件中添加“defined(CONFIG_tekkaman2440)”，使得原来SBC2410X的代码可以编译进来。第181行:
#elif defined(CONFIG_SBC2410X) || \
defined(CONFIG_SMDK2410) || \
defined(CONFIG_VCMA9) ||defined(CONFIG_utu2440)
（4）/cpu/arm920t/s3c24x0/serial.c文件的第22行：
#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) ||defined (CONFIG_S3C2440)
第26行：
#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
（5）/cpu/arm920t/s3c24x0/speed.c文件的第33行：
#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) ||defined (CONFIG_S3C2440)
第37行：
#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
顺便修改源代码，以匹配s3c2440：
static ulong get_PLLCLK(int pllreg)
{
......
m = ((r & 0xFF000) >> 12) + 8;
p = ((r & 0x003F0) >> 4) + 2;
s = r & 0x3;
#if defined(CONFIG_S3C2440)
if (pllreg == MPLL)
return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s));
else if (pllreg == UPLL)
#endif
return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
}
......
/* return FCLK frequency */
ulong get_FCLK(void)
{
return(get_PLLCLK(MPLL));
}
/* return HCLK frequency */
ulong get_HCLK(void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
#if defined(CONFIG_S3C2440)
if (clk_power->CLKDIVN & 0x6)
{
if ((clk_power->CLKDIVN & 0x6)==2) return(get_FCLK()/2);
if ((clk_power->CLKDIVN & 0x6)==6) return((clk_power->CAMDIVN & 0x100) ? get_FCLK()/6 : get_FCLK()/3);
if ((clk_power->CLKDIVN & 0x6)==4) return((clk_power->CAMDIVN & 0x200) ? get_FCLK()/8 : get_FCLK()/4);
return(get_FCLK());
}
else return(get_FCLK());
#else
return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
#endif
}
......
（6）/cpu/arm920t/s3c24x0/usb_ohci.c文件的第45行：
#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
（7）drivers/rtc/s3c24x0_rtc.c文件的第35行：
#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
（8）/cpu/arm920t/s3c24x0/usb.c文件的第31行：
#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
（9）/cpu/arm920t/s3c24x0/i2c.c文件的第35行：
#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
第66、85、142、150、174行：
将“#ifdef CONFIG_S3C2410”改为
#if defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440)
（10）drivers/usb/usb_ohci.c文件的第68行附近：
#if defined(CONFIG_ARM920T) || \
defined(CONFIG_S3C2400) || \
defined(CONFIG_S3C2410) || \
defined(CONFIG_S3C2440) || \
defined(CONFIG_440EP) || \
defined(CONFIG_PCI_OHCI) || \
defined(CONFIG_MPC5200)
9、在 include/linux/mtd/nand_ids.h的结构体nand_flash_ids加入
static struct nand_flash_dev nand_flash_ids[] = {
......
{"Samsung K9F1208U0B", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0},
{NULL,}
};
修改include/linux/mtd/nand.h
/*
* Constants for hardware specific CLE/ALE/NCE
*/
#if 0
/* Select the chip by setting nCE to low */
#define NAND_CTL_SETNCE 1
/* Deselect the chip by setting nCE to high */
#define NAND_CTL_CLRNCE 2
/* Select the command latch by setting CLE to high */
#define NAND_CTL_SETCLE 3
/* Deselect the command latch by setting CLE to low */
#define NAND_CTL_CLRCLE 4
/* Select the address latch by setting ALE to high */
#define NAND_CTL_SETALE 5
/* Deselect the address latch by setting ALE to low */
#define NAND_CTL_CLRALE 6
/* Set write protection by setting WP to high. Not used! */
#define NAND_CTL_SETWP 7
/* Clear write protection by setting WP to low. Not used! */
#define NAND_CTL_CLRWP 8
#endif
10、修改/lib_arm中的board.c。
......
#include <common.h>
#include <command.h>
#include <malloc.h>
#include <devices.h>
#include <version.h>
#include <net.h>
#include <s3c2410.h>
......
void start_armboot (void)
{
init_fnc_t **init_fnc_ptr;
char *s;
#ifndef CFG_NO_FLASH
ulong size;
#endif
#if defined(CONFIG_VFD) || defined(CONFIG_LCD)
unsigned long addr;
#endif
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
......
gpio->GPFDAT = 0x0;
//在进入命令提示符之前，四个LED会同时亮起！
#endif
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;) {
main_loop ();
}
/* NOTREACHED - no way out of command loop except booting */
}
11、 修改common/env_nand.c
......
#ifdef CONFIG_INFERNO
#error CONFIG_INFERNO not supported yet
#endif
int nand_legacy_rw (struct nand_chip* nand, int cmd,
size_t start, size_t len,
size_t * retlen, u_char * buf);
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
extern int nand_legacy_erase(struct nand_chip *nand, size_t ofs, size_t len, int clean);
/* info for NAND chips, defined in drivers/nand/nand.c */
nand_info_t nand_info[CFG_MAX_NAND_DEVICE];
......
#else /* ! CFG_ENV_OFFSET_REDUND */
int saveenv(void)
{
size_t total;
int ret = 0;
nand_erase_options_t nand_erase_options;
nand_erase_options.length = CFG_ENV_RANGE;
nand_erase_options.quiet = 0;
nand_erase_options.jffs2 = 0;
nand_erase_options.scrub = 0;
nand_erase_options.offset = CFG_ENV_OFFSET;
if (CFG_ENV_RANGE < CFG_ENV_SIZE)
return 1;
puts ("Erasing Nand...\n");
// if (nand_erase_opts(&nand_info[0], &nand_erase_options))
if (nand_legacy_erase(nand_dev_desc + 0, CFG_ENV_OFFSET, CFG_ENV_SIZE, 0)) //edited by yaoyi 20090312
return 1;
puts ("Writing to Nand... ");
total = CFG_ENV_SIZE;
// if (writeenv(CFG_ENV_OFFSET, (u_char *) env_ptr)) {
ret = nand_legacy_rw(nand_dev_desc + 0,0x00 | 0x02, CFG_ENV_OFFSET, CFG_ENV_SIZE,&total, (u_char*)env_ptr);
// puts("FAILED!\n");
// return 1;
// }
if (ret || total != CFG_ENV_SIZE)
return 1;
puts ("done\n");
return ret;
}
#else /* ! CFG_ENV_OFFSET_REDUND */
.......
/*
* The legacy NAND code saved the environment in the first NAND device i.e.,
* nand_dev_desc + 0. This is also the behaviour using the new NAND code.
*/
void env_relocate_spec (void)
{
#if !defined(ENV_IS_EMBEDDED)
size_t total;
int ret;
total = CFG_ENV_SIZE;
// ret = readenv(CFG_ENV_OFFSET, (u_char *) env_ptr);
ret = nand_legacy_rw(nand_dev_desc + 0, 0x01 | 0x02, CFG_ENV_OFFSET,CFG_ENV_SIZE, &total, (u_char*)env_ptr);/*edited by yaoyi 20090314,1.3.4是先进入到readenv,而非直接调用nand_legacy_rw。 因此干脆就不用到readenv了，直接注释掉，添加以上代码 */
if (ret || total != CFG_ENV_SIZE)
return use_default();
if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc)
return use_default();
#endif /* ! ENV_IS_EMBEDDED */
}
u-boot运行至第二阶段进入start_armboot()函数。其中nand_init()函数是对nand flash的最初初始化函数。Nand_init()函数在两个文件中实现。其调用与CFG_NAND_LEGACY宏有关，如果没有定义这个宏，系统调用 drivers/nand/nand.c中的nand_init()；否则调用自己在board/utu2440/tekkaman2440.c中的nand_init()函数。这里我选择第二种方式。
12、 修改cpu/arm920t/s3c24x0/nand.c
#ifdef CONFIG_S3C2410_NAND_BBT
nand->options = NAND_USE_FLASH_BBT;
......
#else
//#error "U-Boot legacy NAND support not available for S3C2410" //edited by yaoyi 20090312
#endif
13、修改include/nand.h
.......
//#ifndef CFG_NAND_LEGACY
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
.......
14、 在/board/utu2440/utu2440.c文件的末尾添加对Nand Flash 的初始化函数（在后面Nand Flash的操作都要用到）
#if defined(CONFIG_CMD_NAND)
typedef enum {
NFCE_LOW,
NFCE_HIGH
} NFCE_STATE;
static inline void NF_Conf(u16 conf)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
nand->NFCONF = conf;
}
static inline void NF_Cmd(u8 cmd)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
nand->NFCMD = cmd;
}
static inline void NF_CmdW(u8 cmd)
{
NF_Cmd(cmd);
udelay(1);
}
static inline void NF_Addr(u8 addr)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
nand->NFADDR = addr;
}
static inline void NF_WaitRB(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
while (!(nand->NFSTAT & (1<<0)));
}
static inline void NF_Write(u8 data)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
nand->NFDATA = data;
}
static inline u8 NF_Read(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
return(nand->NFDATA);
}
static inline u32 NF_Read_ECC(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
return(nand->NFECC);
}
#if defined(CONFIG_S3C2440)
static inline void NF_Cont(u16 cont)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
nand->NFCONT = cont;
}
static inline void NF_SetCE(NFCE_STATE s)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
switch (s) {
case NFCE_LOW:
nand->NFCONT &= ~(1<<1);
break;
case NFCE_HIGH:
nand->NFCONT |= (1<<1);
break;
}
}
static inline void NF_Init_ECC(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
nand->NFCONT |= (1<<4);
}
#else
static inline void NF_SetCE(NFCE_STATE s)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
switch (s) {
case NFCE_LOW:
nand->NFCONF &= ~(1<<11);
break;
case NFCE_HIGH:
nand->NFCONF |= (1<<11);
break;
}
}
static inline void NF_Init_ECC(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
nand->NFCONF |= (1<<12);
}
#endif
extern ulong nand_probe(ulong physadr);
static inline void NF_Reset(void)
{
int i;
NF_SetCE(NFCE_LOW);
NF_Cmd(0xFF); /* reset command */
for(i = 0; i < 10; i++); /* tWB = 100ns. */
NF_WaitRB(); /* wait 200~500us; */
NF_SetCE(NFCE_HIGH);
}
static inline void NF_Init(void)
{
#if 0
#define TACLS 0
#define TWRPH0 3
#define TWRPH1 0
#else
#define TACLS 0
#define TWRPH0 4
#define TWRPH1 2
#endif
#if defined(CONFIG_S3C2440)
NF_Conf((TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4));
NF_Cont((0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(0<<6)|(0<<5)|(1<<4)|(0<<1)|(1<<0));
#else
NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0));
/*nand->NFCONF = (1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); */
/* 1 1 1 1, 1 xxx, r xxx, r xxx */
/* En 512B 4step ECCR nFCE=H tACLS tWRPH0 tWRPH1 */
#endif
NF_Reset();
}
void nand_init(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
NF_Init();
#ifdef DEBUG
printf("NAND flash probing at 0x%.8lX\n", (ulong)nand);
#endif
printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20);
}
#endif
三、因为板子上没有cs8900，只有dm9000ae，所以开始移植dm9000ae
1、修改include/configs/utu2440.h
/* Hardware drivers
*/
//#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ //editedby yaoyi 20090314
//#define CS8900_BASE 0x19000300
//#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x18000300
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE+4)
#define CONFIG_DM9000_USE_16BIT
2、修改lib_arm/board.c
#ifdef CONFIG_DRIVER_DM9000
extern int eth_init(bd_t * bd);
#endif
#ifdef CONFIG_DRIVER_DM9000
eth_init(gd->bd);
#endif
3、修改utu2440.h,使读出的MAC不出现00：00：00：00：00：00
....
/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.1.110
#define CONFIG_SERVERIP 192.168.1.1
.......
4、修改drivers/net/dm9000x.c,已读取内存区上的MAC，以及不出现cannot establish the link
添加一个函数声明
/* function declaration ------------------------------------- */
int eth_initfirst(bd_t * bd);
int eth_init(bd_t * bd);
int eth_send(volatile void *, int);
int eth_rx(void);
.......
int
eth_init(bd_t* bd)
{
.....
/* RESET device */
// dm9000_reset();
dm9000_probe();
.....
/* Set Node address */
/*#ifndef CONFIG_AT91SAM9261EK
for (i = 0; i < 6; i++)
((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i);
#endif*/
//edited by yaoyi 20090317
if (is_zero_ether_addr(bd->bi_enetaddr) ||
is_multicast_ether_addr(bd->bi_enetaddr)) {
/* try reading from environment */
u8 i;
puts("ready to read MAC\n");
char *s, *e;
s = getenv ("ethaddr");
for (i = 0; i < 6; ++i) {
bd->bi_enetaddr[i] = s ?simple_strtoul (s, &e, 16) : 0;
if (s)
s = (*e) ? e + 1 : e;
}
}
.......
#if 0
i = 0;
while (!(phy_read(1) & 0x20)) { /* autonegation complete bit */
udelay(1000);
i++;
if (i == 10000) {
printf("could not establish link\n");
return 0;
}
}
/* see what we've got */
lnk = phy_read(17) >> 12;
printf("operating at ");
switch (lnk) {
case 1:
printf("10M half duplex ");
break;
case 2:
printf("10M full duplex ");
break;
case 4:
printf("100M half duplex ");
break;
case 8:
printf("100M full duplex ");
break;
default:
printf("unknown: %d ", lnk);
break;
}
printf("mode\n");
#endif
return 0;
}
在函数int eth_init()后添加eth_initfirst的定义
int eth_initfirst(bd_t * bd)
{
dm9000_reset();
eth_init(bd);
}
最后修改下dm9000_reset如下:
/* Reset DM9000,
see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 */
/* DEBUG: Make all GPIO pins outputs */
// DM9000_iow(DM9000_GPCR, 0x0F);
/* Step 1: Power internal PHY by writing 0 to GPIO0 pin */
DM9000_iow(DM9000_GPR, 0);
/* Step 2: Software reset */
DM9000_iow(DM9000_NCR, 3);
三、交叉编译U－Boot。
这篇文章的移植使用DM9000网卡。Tftp功能是可用的.不过tftp的时候记得关掉selinux，以及iptables
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