<rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:trackback="http://madskills.com/public/xml/rss/module/trackback/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/"><channel><title>zhongrg的专栏 - FPGA文章</title><link>http://blog.csdn.net/zhongrg/category/335008.aspx</link><description /><dc:language>zh-CN</dc:language><lastUpdateTime>Sun, 20 Apr 2008 11:17:43 GMT</lastUpdateTime><ttl>60</ttl><item><dc:creator>刚子</dc:creator><title>] FPGA设计需注意的方方面面</title><link>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192831.aspx</link><pubDate>Mon, 17 Mar 2008 20:16:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192831.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/2192831.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192831.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/2192831.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=2192831</trackback:ping><description>] FPGA设计需注意的方方面面&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/2192831.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>FPGA设计中关键问题的研究</title><link>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192822.aspx</link><pubDate>Mon, 17 Mar 2008 20:10:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192822.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/2192822.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192822.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/2192822.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=2192822</trackback:ping><description>FPGA设计中关键问题的研究&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/2192822.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>FPGA设计中的编程技巧</title><link>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192817.aspx</link><pubDate>Mon, 17 Mar 2008 20:06:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192817.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/2192817.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192817.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/2192817.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=2192817</trackback:ping><description>FPGA设计中的编程技巧&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/2192817.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>FPGA系统设计实战经验分享－硬件篇</title><link>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192809.aspx</link><pubDate>Mon, 17 Mar 2008 20:03:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192809.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/2192809.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192809.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/2192809.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=2192809</trackback:ping><description>FPGA系统设计实战经验分享－硬件篇&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/2192809.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>[转帖]我的FPGA开发体会</title><link>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192794.aspx</link><pubDate>Mon, 17 Mar 2008 20:00:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192794.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/2192794.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192794.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/2192794.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=2192794</trackback:ping><description>[转帖]我的FPGA开发体会&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/2192794.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>FPGA设计经验教训杂谈</title><link>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192798.aspx</link><pubDate>Mon, 17 Mar 2008 20:00:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192798.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/2192798.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192798.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/2192798.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=2192798</trackback:ping><description>FPGA设计经验教训杂谈&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/2192798.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>ARM、DSP、FPGA的技术特点和区别是什么</title><link>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192792.aspx</link><pubDate>Mon, 17 Mar 2008 19:59:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192792.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/2192792.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2008/03/17/2192792.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/2192792.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=2192792</trackback:ping><description>ARM、DSP、FPGA的技术特点和区别是什么&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/2192792.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>UART</title><link>http://blog.csdn.net/zhongrg/archive/2007/12/25/1966073.aspx</link><pubDate>Tue, 25 Dec 2007 11:18:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2007/12/25/1966073.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/1966073.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2007/12/25/1966073.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/1966073.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=1966073</trackback:ping><description>UART&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/1966073.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>SOPC中自定义外设和自定义指令性能分析</title><link>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893528.aspx</link><pubDate>Mon, 19 Nov 2007 21:23:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893528.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/1893528.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893528.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/1893528.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=1893528</trackback:ping><description>SOPC中自定义外设和自定义指令性能分析
&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/1893528.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>如何采用FPGA协处理器实现算法加速 </title><link>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893406.aspx</link><pubDate>Mon, 19 Nov 2007 20:22:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893406.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/1893406.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893406.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/1893406.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=1893406</trackback:ping><description>如何采用FPGA协处理器实现算法加速 
 
&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/1893406.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>FPGA协处理器的优势（转载）</title><link>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893400.aspx</link><pubDate>Mon, 19 Nov 2007 20:20:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893400.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/1893400.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2007/11/19/1893400.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/1893400.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=1893400</trackback:ping><description>FPGA协处理器的优势（转载）&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/1893400.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>如何用FPGA实现算法的硬件加速</title><link>http://blog.csdn.net/zhongrg/archive/2007/11/18/1891335.aspx</link><pubDate>Sun, 18 Nov 2007 17:41:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2007/11/18/1891335.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/1891335.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2007/11/18/1891335.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/1891335.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=1891335</trackback:ping><description>如何用FPGA实现算法的硬件加速&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/1891335.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>FPGA查找表</title><link>http://blog.csdn.net/zhongrg/archive/2007/10/31/1860045.aspx</link><pubDate>Wed, 31 Oct 2007 20:20:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2007/10/31/1860045.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/1860045.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2007/10/31/1860045.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/1860045.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=1860045</trackback:ping><description>FPGA查找表&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/1860045.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>SignalTap Ⅱ嵌入式逻辑分析仪的使用</title><link>http://blog.csdn.net/zhongrg/archive/2007/10/30/1858119.aspx</link><pubDate>Tue, 30 Oct 2007 21:54:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2007/10/30/1858119.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/1858119.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2007/10/30/1858119.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/1858119.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=1858119</trackback:ping><description>SignalTap Ⅱ嵌入式逻辑分析仪的使用&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/1858119.aspx" width = "1" height = "1" /&gt;</description></item><item><dc:creator>刚子</dc:creator><title>LVDS接口是什么接口？</title><link>http://blog.csdn.net/zhongrg/archive/2007/10/26/1845190.aspx</link><pubDate>Fri, 26 Oct 2007 15:34:00 GMT</pubDate><guid>http://blog.csdn.net/zhongrg/archive/2007/10/26/1845190.aspx</guid><wfw:comment>http://blog.csdn.net/zhongrg/comments/1845190.aspx</wfw:comment><comments>http://blog.csdn.net/zhongrg/archive/2007/10/26/1845190.aspx#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://blog.csdn.net/zhongrg/comments/commentRss/1845190.aspx</wfw:commentRss><trackback:ping>http://tb.blog.csdn.net/TrackBack.aspx?PostId=1845190</trackback:ping><description>LVDS接口是什么接口？&lt;img src ="http://blog.csdn.net/zhongrg/aggbug/1845190.aspx" width = "1" height = "1" /&gt;</description></item></channel></rss>