vivado里那些看不懂的约束语句

从FLASH加载程序

set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
设置从flash将程序加载到FPGA的位宽
参考：https://zhuanlan.zhihu.com/p/133819529

管脚悬空

管脚悬空
set_property SEVERITY {Warning} [get_drc_checks UCIO-1]

UCIO #1 7 out of 12 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: b_pad_gpio_porta[7], b_pad_gpio_porta[6], b_pad_gpio_porta[5], b_pad_gpio_porta[4], b_pad_gpio_porta[3], b_pad_gpio_porta[2], b_pad_gpio_porta[1].

很担心软件是否会给悬空的管脚随机分配约束
这个操作很危险，通过implement中可以看到，vivado对管脚进行了随机分配。

使用默认电平
set_property SEVERITY {Warning} [get_drc_checks NSTD-1]

7 out of 12 logical ports use I/O standard (IOSTANDARD) value ‘DEFAULT’, instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: b_pad_gpio_porta[7], b_pad_gpio_porta[6], b_pad_gpio_porta[5], b_pad_gpio_porta[4], b_pad_gpio_porta[3], b_pad_gpio_porta[2], b_pad_gpio_porta[1].

建议不要让管脚悬空！！！

未使用的管脚电平管理

以克服板子上的LED莫名点亮
set_property BITSTREAM.CONFIG.UNUSEDPIN Pulldown [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN Pullnone [current_design]

压缩bit文件大小

set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]