串口发送模块学习

学习视频链接：10A 串口发送应用之发送数据_哔哩哔哩_bilibili

//接口数量
module uart_byte_tx(
    Clk,
    Reset_n,
    Send_en,
    Baud_set,
    Uart_tx,
    Tx_done
);

    //接口类型 
    input Clk;
    input Reset_n;   
    input  Send_en;//发送指令为1工作
    input [2:0]Baud_set;
    output reg Uart_tx;//时序波型数据位
    output reg Tx_done;

    //中间变量
    reg [7:0]Data;
    reg [17:0]div_cnt;
    reg [17:0]bps_DR;
    reg [3:0]bps_cnt;
    reg [19:0]time_cnt;
    reg flag_bps_cnt;
    wire bps_clk;
    
    
    
    //Baud_set = 0 -> bps_DR = 9600;
    //Baud_set = 1 -> bps_DR = 19200;
    //Baud_set = 2 -> bps_DR = 38400;
    //Baud_set = 3 -> bps_DR = 57600;
    //Baud_set = 4 -> bps_DR = 115200;
    //10^9/bps_DR/20
    always@(*)
        case(Baud_set)
            0: bps_DR = 1000000000/9600/20;
            1: bps_DR = 1000000000/19200/20;
            2: bps_DR = 1000000000/38400/20;
            3: bps_DR = 1000000000/57600/20;
            4: bps_DR = 1000000000/115200/20;
            default:bps_DR = 1000000000/9600/20;
        endcase
    
    assign bps_clk = (div_cnt == 1);
    
    always@(posedge Clk or negedge Reset_n)   //10000000/20 10ms计时器
    if(!Reset_n)
        time_cnt <= 0;
    else if(time_cnt == 10000000/20 - 1)
        time_cnt <= 0;
    else
        time_cnt <= time_cnt+1;
    
    always@(posedge Clk or negedge Reset_n)   //内部产生的发射信号1、2、3
    if(!Reset_n)
        Data <= 0;
    else if(time_cnt == 1)begin
        Data <= Data+1;
    end
 
// 思考一下把flag改为Send_en //好像不行输入变量无法reg
//always@(posedge Clk or negedge Reset_n)   //唤醒flag 控制bps_cnt
//    if(!Reset_n)
//        flag_bps_cnt <= 0;
//    else if(time_cnt == 1)
//        flag_bps_cnt <=1;
    always@(posedge Clk or negedge Reset_n) 
        if(!Reset_n)                        
            flag_bps_cnt <= 0;              
        else if(time_cnt == 1)              
            flag_bps_cnt <=1;               
            
//cnt计数分隔段        
    always@(posedge Clk or negedge Reset_n)
    if(!Reset_n)
        div_cnt <= 0;
    else if(flag_bps_cnt)begin
        if(Send_en)begin
            if(div_cnt == bps_DR-1)
                div_cnt <= 0;
            else 
                div_cnt <= div_cnt + 1'b1;
        end
    end
    else
        div_cnt <= 0;
           
     // 计数发送1+8+1=10段  
    always@(posedge Clk or negedge Reset_n)
    if(!Reset_n)
        bps_cnt <= 0;
    else if(flag_bps_cnt)begin
        if(Send_en)begin
             if( bps_clk)begin
                 if(bps_cnt == 12)
                     bps_cnt <= 0;
                 else 
                     bps_cnt <= bps_cnt + 1'b1;
             end 
        end
    end
    else
        bps_cnt <= 0;
    
//发送数据
    always@(posedge Clk or negedge Reset_n)
    if(!Reset_n)begin
        Uart_tx <= 1'b1;
        Tx_done<= 1'b0;
    end
    else begin
        case(bps_cnt)
            0:Tx_done<= 1'b1;
            1:begin Uart_tx <= 0;end 
            2: Uart_tx <= Data[0];               
            3: Uart_tx <= Data[1];               
            4: Uart_tx <= Data[2];               
            5: Uart_tx <= Data[3];               
            6: Uart_tx <= Data[4];               
            7: Uart_tx <= Data[5];               
            8: Uart_tx <= Data[6];               
            9: Uart_tx <= Data[7];               
            10:Uart_tx <= 1;                     
            11:begin Uart_tx <= 1;Tx_done<= 1'b0;end
            12:flag_bps_cnt <=0;
               //结束空间                            
            default:Uart_tx <= 1;
         
        endcase
    end
             
endmodule