android uboot config nor flash

  1. u-boot/drivers/mtd/spi/sf_params.c 这个文件定义了支持的nor flash
  2. 依据不同的型号更改配置
    ···
    diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
    index 128e7b2..44ae9f2 100644
    --- a/configs/dra7xx_evm_defconfig
    +++ b/configs/dra7xx_evm_defconfig
    @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y
    CONFIG_CMD_USB_MASS_STORAGE=y
    CONFIG_SPI_FLASH=y
    CONFIG_SPI_FLASH_BAR=y
    -CONFIG_SPI_FLASH_SPANSION=y
    +CONFIG_SPI_FLASH_WINBOND=y
    CONFIG_SYS_NS16550=y
    CONFIG_TI_QSPI=y
    CONFIG_TIMER=y
    ···
  3. config paramer
    ···
    DECLARE_GLOBAL_DATA_PTR;

/* ti qpsi register bit masks */

define QSPI_TIMEOUT 2000000

define QSPI_FCLK 192000000

define QSPI_DRA7XX_FCLK 76800000

define QSPI_WLEN_MAX_BITS 128

define QSPI_WLEN_MAX_BYTES (QSPI_WLEN_MAX_BITS >> 3)

/* clock control */

define QSPI_CLK_EN BIT(31)

define QSPI_CLK_DIV_MAX 0xffff

/* command */

define QSPI_EN_CS(n) (n << 28)

define QSPI_WLEN(n) ((n-1) << 19)

define QSPI_3_PIN BIT(18)

define QSPI_RD_SNGL BIT(16)

define QSPI_WR_SNGL (2 << 16)

define QSPI_INVAL (4 << 16)

define QSPI_RD_QUAD (7 << 16)

/* device control */

define QSPI_DD(m, n) (m << (3 + n*8))

define QSPI_CKPHA(n) (1 << (2 + n*8))

define QSPI_CSPOL(n) (1 << (1 + n*8))

define QSPI_CKPOL(n) (1 << (n8))
/
status */

define QSPI_WC BIT(1)

define QSPI_BUSY BIT(0)

define QSPI_WC_BUSY (QSPI_WC | QSPI_BUSY)

define QSPI_XFER_DONE QSPI_WC

define MM_SWITCH 0x01

define MEM_CS(cs) ((cs + 1) << 8)

define MEM_CS_UNSELECT 0xfffff0ff/* 0xfffff8ff */

define MMAP_START_ADDR_DRA 0x5c000000

define MMAP_START_ADDR_AM43x 0x30000000

define CORE_CTRL_IO 0x4a002558

define QSPI_CMD_READ (0x3 << 0)

define QSPI_CMD_READ_DUAL (0x6b << 0)

define QSPI_CMD_READ_QUAD (0x6b << 0)

define QSPI_CMD_READ_FAST (0x0b << 0)

define QSPI_SETUP0_NUM_A_BYTES (0x2 << 8)

define QSPI_SETUP0_NUM_D_BYTES_NO_BITS (0x0 << 10)

define QSPI_SETUP0_NUM_D_BYTES_8_BITS (0x1 << 10)

define QSPI_SETUP0_READ_NORMAL (0x0 << 12)

define QSPI_SETUP0_READ_DUAL (0x1 << 12)

define QSPI_SETUP0_READ_QUAD (0x3 << 12)

define QSPI_CMD_WRITE (0x2 << 16)

define QSPI_NUM_DUMMY_BITS (0x0 << 24)

···

转载于:https://www.cnblogs.com/widic/p/9950702.html

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