CPU主板测试AXICOM驱动问题汇总

[在此处输入文章标题]

 

 

问题一（已解决）关于axicom驱动在CPU主板和管理板不能中断的故障处理

1. 怀疑AMP的问题，后经过升入SMP的模式后，依然不行，
2. 因为故障是没有打印信息，后来怀疑驱动中的printk的故障，在/proc/sys/kernel中修改printk的级别（原来为7 4 1 7），改为8 4 1 7,故障依旧
3. 在后来把原来的AMP的固件全部加载，并加入刘工新生成的bit文件，并加入修改过的设备树，发现问题解决。

 

 

 

  

问题二 关于SGI驱动不能中断的故障处理

写入新的驱动，主要完成SGI（软中断的处理）

 

 

 

 

根据同事的建议，在xilinx SDK的工程里面先实现软中断，

/*****************************************************************************/

/**

*

* Allows software to simulate an interrupt in the interrupt controller.  This

* function will only be successful when the interrupt controller has been

* started in simulation mode.  A simulated interrupt allows the interrupt

* controller to be tested without any device to drive an interrupt input

* signal into it.

*

* @param    InstancePtr is a pointer to the XScuGic instance.

* @param    Int_Id is the software interrupt ID to simulate an interrupt.

* @param    Cpu_Id is the list of CPUs to send the interrupt.

*

* @return

*

* XST_SUCCESS if successful, or XST_FAILURE if the interrupt could not be

* simulated

*

* @note     None.

*

******************************************************************************/

s32  XScuGic_SoftwareIntr(XScuGic *InstancePtr, u32 Int_Id, u32 Cpu_Id)

{

    u32 Mask;

    /*

     * Assert the arguments

     */

    Xil_AssertNonvoid(InstancePtr != NULL);

    Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

    Xil_AssertNonvoid(Int_Id <= 15U) ;

    Xil_AssertNonvoid(Cpu_Id <= 255U) ;

    /*

     * The Int_Id is used to create the appropriate mask for the

     * desired interrupt. Int_Id currently limited to 0 - 15

     * Use the target list for the Cpu ID.

     */

    Mask = ((Cpu_Id << 16U) | Int_Id) &

        (XSCUGIC_SFI_TRIG_CPU_MASK | XSCUGIC_SFI_TRIG_INTID_MASK);

    /*

     * Write to the Software interrupt trigger register. Use the appropriate

     * CPU Int_Id.

     */

    XScuGic_DistWriteReg(InstancePtr, XSCUGIC_SFI_TRIG_OFFSET, Mask);

    /* Indicate the interrupt was successfully simulated */

    return XST_SUCCESS;

}

}

NO	ph address	name	value
1	0xF8F00208	Global_Timer_Control_Register	0
2	0xF8F00200	Global_Timer_Counter_Register0	0
3	0xF8F00204	Global_Timer_Counter_Register1	0
4	0xF8F00208	Global_Timer_Control_Register	1
5	0xF8F02F40	reg15_debug_ctrl	0x03
6	0xF8F027FC	reg7_clean_inv_way	0xFFFF
7	0xF8F02740		0
8	0xF8F01000	ICDDCR（分配控制寄存器）	0
9	0xF8F01c08	ICDICFR2(中断配置寄存器)	0
10	0xF8F01c0c	ICDICFR3	0
11	0xF8F01c10	ICDICFR4	0
12	0xF8F01c14	ICDICFR5	0
13	0xF8F01400	ICDIPR0(中断优先级寄存器)	0xa0a0a0a0
14	0xF8F01404	ICDIPR1	0xa0a0a0a0
15	0xF8F01408	ICDIPR2	0xa0a0a0a0
16	0xF8F0140c	ICDIPR3	0xa0a0a0a0
17	0xF8F01410	ICDIPR4	0xa0a0a0a0
18	0xF8F01414	ICDIPR5	0xa0a0a0a0
19	0xF8F01418	ICDIPR6	0xa0a0a0a0
20	0xF8F0141c	ICDIPR7	0xa0a0a0a0
21	0xF8F01424	ICDIPR9	0xa0a0a0a0
22	0xF8F01428	ICDIPR10	0xa0a0a0a0
23	0xF8F0142c	ICDIPR11	0xa0a0a0a0
24	0xF8F01430	ICDIPR12	0xa0a0a0a0
25	0xF8F01434	ICDIPR13	0xa0a0a0a0
26	0xF8F01438	ICDIPR14	0xa0a0a0a0
27	0xF8F0143c	ICDIPR15	0xa0a0a0a0
28	0xF8F01440	ICDIPR16	0xa0a0a0a0
29	0xF8F01444	ICDIPR17	0xa0a0a0a0
30	0xF8F01448	ICDIPR18	0xa0a0a0a0
31	0xF8F0144c	ICDIPR19	0xa0a0a0a0
32	0xF8F01450	ICDIPR20	0xa0a0a0a0
33	0xF8F01454	ICDIPR21	0xa0a0a0a0
34	0xF8F01458	ICDIPR22	0xa0a0a0a0
35	0xF8F0145c	ICDIPR23	0xa0a0a0a0
36	0xF8F01820	ICDIPTR8(中断目标设置寄存器)	0x01010101
37	0xF8F01824	ICDIPTR9	0x01010101
38	0xF8F01828	ICDIPTR10	0x01010101
39	0xF8F0182c	ICDIPTR11	0x01010101
40	0xF8F01830	ICDIPTR12	0x01010101
41	0xF8F01834	ICDIPTR13	0x01010101
42	0xF8F01838	ICDIPTR14	0x01010101
43	0xF8F0183c	ICDIPTR15	0x01010101
44	0xF8F01840	ICDIPTR16	0x01010101
45	0xF8F01844	ICDIPTR17	0x01010101
46	0xF8F01848	ICDIPTR18	0x01010101
47	0xF8F0184c	ICDIPTR19	0x01010101
48	0xF8F01850	ICDIPTR20	0x01010101
49	0xF8F01854	ICDIPTR21	0x01010101
50	0xF8F01858	ICDIPTR22	0x01010101
51	0xF8F0185C	ICDIPTR23	0x01010101
52	0xF8F01180	ICDICER0(中断清除/使能寄存器)	0xFFFFFFFF
53	0xF8F01184	ICDICER1	0xFFFFFFFF
54	0xF8F01188	ICDICER2	0xFFFFFFFF
55	0xF8F01000	ICDDCR（分配控制寄存器）	0x01
56	0xF8F00104	ICCPMR(中断优先级屏蔽寄存器)	0xF0
57	0xF8F00100	ICCICR(CC CPU接口配置寄存器）	0x07
58	0xF8F01100	ICDISER0(中断设置启动寄存器)	0x1000
59	0xFFFFFFF0	cpu1 jump	0x200000
60	0xF8F01F00	ICDSGIR（软中断产生寄存器）	0x0003000c
61	0xF8F00110	ICCEOIR（中断结束寄存器）	0x0000000c