Design of Analog CMOS Integrated Circuits Chap8(Razavi)
Feedback
General Considerations
- Y ( s ) X ( s ) = H ( s ) 1 + G ( s ) H ( s ) = A 1 + β A ≈ 1 β ( β A > > 1 ) \frac{Y(s)}{X(s)}=\frac{H(s)}{1+G(s)H(s)}=\frac{A}{1+\beta A}\approx\frac{1}{\beta}(\beta A>>1) X(s)Y(s)=1+G(s)H(s)H(s)=1+βAA≈β1(βA>>1)
- The closed-loop gain is less sensitive to device parameters than the open-loop gain is. One may also say that negative
feedback “stabilizes” the gain and hence “improves the stability.” - 在不考虑负载效应的情况下,选择晶体管栅极断开环路就可以算出环路增益
- 用增益换带宽(反馈不改变GBW)
- 由于负反馈一般降低增益来换取带宽,可以用级联负反馈放大器的方法在获得同样增益的情况下增大带宽,减小非线性,提高速度,代价是功耗上升
- Sense and Return Mechanisms:种类很多,随便看看
Feedback Topologies
- V-V Feedback
- 并-串
- increase input impedance(由于负反馈的影响前向网络的阻抗只收到输入电压的一部分,产生较小的电流,从输出端口看进去的输入阻抗因此增大)
- decrease output impedance(输出端加电压Vx,反馈网络也会产生一个电流,输出端总电流变大,从输出端看进去的输出阻抗因此变小)
- useful as a buffer stage that can be interposed between a high-impedance source and a low-impedance load
- C-V Feedback
- 串-串
- increase input impedance
- increase output impedance
- The high output impedane proves useful in high-gain op amps
- V-C Feedback
- 并-并
- decrease input impedance
- decrease output impedance
- The low input impedance proves useful in fiber optic receivers
- C-C Feedback
- 串-并
- decrease input imped