A FLASH Bootloader for PIC16 and PIC18 Devices--硬译（二）

Author: Ross M. Fosler and
              Rodger Richey
              Microchip Technology Inc.
译者： 逐影Linux
Memory Organization 内存组织
PROGRAM MEMORY USAGE（ 程序存储区使用）
Currently, PIC18F devices reserve the first 512 bytes of Program Memory as the boot block.
目前，PIC18F器件使用第一个512字节的程序存储区作为boot block。
Future devices may expand this, depending on application requirements for these devices.
未来的器件有可能被扩展，依赖于这些器件的应用程序需求。 
However, this bootloader is designed to occupy the current designated boot block of 512 
bytes (or 256 words) of memory. 
然而，这个bootloader将会被设计占用当前内存中指定的512字节（或者256字）的boot block。
Figure 3 shows a memory map of the PIC18F452. 图3 显示了PIC18F452的内存映射
The boot area can be code protected to prevent accidental overwriting of the boot program.
这个boot区会编码保护，防止意外的boot程序覆盖。
PIC16F87XA enhanced microcontrollers are designed to use the first 256 words of program 
memory. 

PIC16F87XA 增强微控制器将被设计去利用第一个256字（应该是256字节吧，译者注）的程序
存储区。

Figure 4 shows the memory map of the PIC16F877A.   图4显示了PIC16F877A的内存映射
Like the PIC18F452 and other PIC18F devices, the boot area can be write protected 
to prevent accidental overwriting of the boot program.

像PIC18F452和其他PIC18F器件，这个boot区会编码保护，防止意外的boot程序覆盖。

REMAPPED VECTORS（重映射向量表）
Since the hardware RESET and interrupt vectors lie within the boot area and cannot be edited if the block
 is protected, they are remapped through software to the nearest parallel location outside the boot block.
因为硬件复位和中断向量表在boot区，不能被编辑如果有块保护, 他们是通过软件重新映射引导块之外最近
的平行位置上。（译者注：关于中断重映射说明，参考http://www.docin.com/p-575091949.html）
Remapping is simply a branch for interrupts, so PIC18F users should note an additional latency of 2
 instruction cycles to handle interrupts. Upon RESET, there are some boot condition checks, so the RESET 
latency is an additional 10 instruction cycles (as seen in the example source code).
重映射是一个简单的中断分支,所以PIC18F用户应该注意一个额外的延迟2指令周期来处理中断。在复位之前,
有一些引导条件检查,所以复位延时是一个额外的10个指令周期(正如所见的示例的源代码)。
For PIC16F87XA devices, the interrupt latency is an additional 9 instruction cycles on top of 
the 3 to 4 normally experienced; the RESET latency is 18 instruction cycles. 
PIC16F87XA器件中，中断延时是额外的9个指令周期，经过3到4次。 复位延时则是18个指令周期。
This additional latency comes from saving device context data in shared memory. The example code uses 
locations 7Dh, 7Eh, and 7Fh to store the PCLATH, STATUS, and W registers, respectively.
这额外的延迟来自在共享内存中保存的器件 上下文数据。这个示例代码使用地址7DH,7EH,和7FH来分别保存
PCLATH,STATUS 和W寄存器。
The source code can be changed, but the saved data must remain in the shared memory area.　
源代码可以改变,但保存的数据必须仍然在共享内存区域。

DATA MEMORY USAGE （数据存储区的使用）

The last location in data memory of the device (Figure 5) is reserved as a non-volatile Boot mode flag. 
This location contains FFh by default, which indicates Boot mode.  Any other value in this location indicates 
normal Execution mode.

器件在数据存储区的最后一个位置(图5)被保留作为一个非易失性启动模式标志。这个位置包含FFh默认情况下,
显示启动模式。在这个位置任何其他值则显示正常执行模式。

图5 数据存储区映射