ModelSim PE, DE, SE, XE

Thecombination of industry-leading performance and capacity with thebest integrated debug and analysis environment makes ModelSim thesimulator of choice for both ASIC and FPGAdesign. Combining single kernelsimulator (SKS) technology with a unified debug environment forVHDL, Verilog, SystemVerilog, and SystemC makes ModelSim theworld’s most widely usedsimulator. The ModelSim productrange includes ModelSim PE, DE & SE covering thecomplete range of requirements from small FPGA designs through tothe largest System on Chip (SoC) devices. As for Modelsin XE (forXilinx), it is out of date.


 

ModelSim PE (Personal Edition)is the industry-leading, Windows-based simulator for VHDL, Verilog,or mixed-language simulation environments offering a very costeffective solution for RTL and gate levelsimulation; 

ModelSim DE (Deluxe Edition)includes full PE functionality plus PSL & SystemVerilog assertions, Code Coverage,  EnhancedDataflow, Waveform Compare, and support for Xilinx SecureIP asstandard; 

ModelSim SE (System Edition)combines high performance and high capacity with the code coverageand debugging capabilities required to simulate larger blocks andsystems and attain ASIC gate-level sign-off. ModelSim SE offers theability to simulate very large designs.

一些配套的工具

WaveformCompare 


The Waveform Compare featurecompares the results of two simulations in order to identify designerrors. Waveform Compare is completely configurable offeringcontinuous compares, clocked compares, and even create complexcompares using ModelSim's virtual signal capabilities. WaveformCompare results can be viewed in a display window or captured intext files. 


Included with ModelSim SE& DE. Cost option forPE. 


CodeCoverage 


ModelSim code coverageanalysis offers an easy-to-use, integrated code coverage capabilitythat helps develop more complete, robust testbenches quickly.Coverage types supported include statement coverage, branchcoverage, condition coverage, branch coverage &finite state machine coverage. 


Included with ModelSim SE& DE. Cost option for PE.


Xilinx SecureIP interface(Replaces SWIFT Interface)



The ModelSim SecureIP optionallows simulation of Xilinx encrypted IP cores. The SecureIPinterface offers vastly greater simulation performance over theinstantiation of these cores as gate level netlists.


Included with ModelSim SE& DE. Cost option for PE.


Free upgrade to SecureIP forcustomers with the older SWIFT interface module undermaintenance



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