- 博客(1)
- 资源 (16)
- 收藏
- 关注
RSS订阅原创 matlab fopen，fread，fseek，fwrite，fclose函数的用法
转载：https://blog.csdn.net/sinat_41612591/article/details/841961981.fopen():打开文件或获取关于打开文件的信息，下面以使用最多的情况为例：fileID = fopen(filename,permission)：打开文件，成功时，返回一个大于或等于3的整数文件标识符；filename：将要被打开文件的本地路径；pe...
2019-09-16 14:16:02
1254
questasim 安装包
questasim 安装包questasim 安装包questasim 安装包questasim 安装包questasim 安装包questasim 安装包questasim 安装包questasim 安装包questasim 安装包questasim 安装包
2020-12-27
sublim package control
手动安装package control 文件，官网下载速度太慢，这里共享给大家，手动添加文件到 install package 文件夹下即可
2020-11-25
NOIP1SN5000A
The PYTHON 2000 and PYTHON 5000 image sensors
utilize high sensitivity 4.8 m x 4.8 m pixels that support
low noise “pipelined” and “triggered” global shutter readout
modes. The sensors support correlated double sampling
(CDS) readout, reducing noise and increasing dynamic
range.
2017-12-23
altera 原语手册
Designing with Low-Level Primitives
Chapter 2. Primitive Reference
Primitives ................................................................................................................................................ 2–1
ALT_INBUF ...................................................................................................................................... 2–1
ALT_OUTBUF .................................................................................................................................. 2–3
ALT_OUTBUF_TRI .......................................................................................................................... 2–6
ALT_IOBUF ....................................................................................................................................... 2–8
ALT_INBUF_DIFF ......................................................................................................................... 2–11
ALT_OUTBUF_DIFF ..................................................................................................................... 2–13
ALT_OUTBUF_TRI_DIFF ............................................................................................................. 2–14
ALT_IOBUF_DIFF .......................................................................................................................... 2–19
ALT_BIDIR_DIFF ........................................................................................................................... 2–22
ALT_BIDIR_BUF ............................................................................................................................ 2–25
LCELL .............................................................................................................................................. 2–27
DFF ................................................................................................................................................... 2–28
CARRY and CARRY_SUM ........................................................................................................... 2–29
CASCADE ....................................................................................................................................... 2–30
LUT_INPUT .................................................................................................................................... 2–31
LUT_OUTPUT ................................................................................................................................ 2–32
2017-11-21
ZedBoard Zynq-7000 ARM FPGA进阶级处理器 全可编程逻辑智能互联开发系统 用户手册.pdf
ZedBoard Zynq-7000 ARM FPGA进阶级处理器 全可编程逻辑智能互联开发系统 用户手册.pdf
2017-10-11
ug388 User Guide
THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY KIND. XILINX MAKES NO OTHER
WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY
RIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANY CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL
DAMAGES, INCLUDING ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OF THE DOCUMENTATION
2017-10-11
Xilinx FPGA应用进阶 通用IP核详解和设计开发
Xilinx FPGA应用进阶 通用IP核详解和设计开发
Xilinx FPGA发展和应用
Xilinx FPGA时钟资源详述
black ram 核的功能简介和应用说明
2017-10-10
空空如也
TA创建的收藏夹 TA关注的收藏夹
TA关注的人