CC2541的捕获功能配置(P0_5)

#define BIT7                       0x80
#define BIT6                       0x40
#define BIT5                       0x20
#define BIT4                       0x10
#define BIT3                       0x08
#define BIT2                       0x04
#define BIT1                       0x02
#define BIT0                       0x01


#define T1CCTLn_IM                 0x40            // Interrupt mask. Enables interrupt request when set.


// T1STAT (0xAF) - Timer 1 Status
#define T1STAT_OVFIF                      0x20    // Overflow interrupt flag
#define T1STAT_CH4IF                      0x10    // Overflow interrupt flag
#define T1STAT_CH3IF                      0x08    // Overflow interrupt flag
#define T1STAT_CH2IF                      0x04    // Overflow interrupt flag
#define T1STAT_CH1IF                      0x02    // Overflow interrupt flag
#define T1STAT_CH0IF                      0x01    // Overflow interrupt flag


#define T1CTL_MODE                        (0x03)
#define T1CTL_DIV                         (0x0C)
#define T1CTL_MODE_FREERUN                (0x01) 
#define T1CTL_DIV_32                      (0x02 << 2)
#define T1CCTLn_CAP_RISE_EDGE             (0x01)        // Capture on rising edge
#define T1CCTLn_CAP_FALL_EDGE             (0x02)        // Capture on falling edge
#define T1CCTLn_CAP_BOTH_EDGE             (0x03)        // Capture on both edges
#define T1CCTLn_MODE                      0x04          // Compare mode when set, capture mode when cleared
#define T1CCTLn_CAP                       (0x03)        // Capture mode bit mask
#define P2DIR_PRIP0_T1_0_1                (0x02 << 6) // Timer 1 channels 0-1 has priority, then USART 1, then USART 0, then Timer 1 channels 2-3
#define P2DIR_PRIP0_T1_2_3                (0x03 << 6)



void timer1_Init_2_3(void)

{
    // Select P0_5 for peripheral function.
    P0SEL |= BIT5;      //选择P0_5的外设功能
 
    
    P2DIR |= P2DIR_PRIP0_T1_2_3;
    
    T1STAT &= ~T1STAT_CH3IF;
    
     // Set individual interrupt enable bit in the peripherals SFR.
    T1CCTL0 &= ~T1CCTLn_IM;    // Displayable interrupt on channel 0.
    T1CCTL1 &= ~T1CCTLn_IM;    // Disable interrupt on channel 1.
    T1CCTL2 &= ~T1CCTLn_IM;    // Disable interrupt on channel 2.
    T1CCTL3 |= T1CCTLn_IM;    // Enable interrupt on channel 3.
    T1CCTL4 &= ~T1CCTLn_IM;     // Disable  interrupt on channel 4.
    T1OVFIM = 0;               // Disable overflow interrupt.
    
    // Enable Timer 1 interrupts by setting [IEN1.T1IE=1].
    T1IE = 1;


    // Enable global interrupt by setting the [IEN0.EA=1].
    EA = 1;
    
     // Select capture mode [T1CCTLn.MODE = 0], and set capture mode to capture on both edge.
    T1CCTL3 = (T1CCTL3 & ~(T1CCTLn_CAP | T1CCTLn_MODE)) | T1CCTLn_CAP_BOTH_EDGE;


    // Set prescalar divider value to 32 to get a tickspeed of 500 kHz and
    // set Timer 1 to free running mode.
    T1CTL = (T1CTL & ~(T1CTL_MODE | T1CTL_DIV)) | T1CTL_MODE_FREERUN | T1CTL_DIV_32;


    // Timer 1 will now start counting...


}
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