Cortex_a7_mpcore_r0p5_trm.pdf阅读总结

0. Preface

Cortex_a7_mpcore_r0p5_trm.pdf，即Cortex-A7 MPCore Technical Reference Manual，是针对拥有1-4个processor的Coretex-A7 MPCore Processor。

Chapter 1. Introduction

Cortex-A7 MPCore Processor: ARMv7-A architecture，包括1~4 processors in a single multiprocessor device with a L1 cache subsystem, an  optional integrated GIC, and an optional L2 cache controller.即Cortex-A7 MPCore Processor包含1~4个processor，L1 cache subsystem，GIC与L2 cache controller可有可无。

This TRM complements architecture reference manuals, architecture specifications, protocol specifications, and relevant external standards.  It does not duplicate information from these sources.

即本文档是architecture reference manuals, architecture specifications, protocol specifications, and relevant external standards的补充，该文档不重复上述文档已有的信息。