论文分享：Unlocking Energy

Motivation

锁有以下特点：

• 现有的并行系统的多线程同步大部分用锁来实现的。
• 锁由于抽象的比较好，所以算法的实现并不会影响整体系统的正确性。
• 有些锁的策略会比其他策略消耗更多的功耗。

而本文发现在改善锁的功耗的同时，往往会改善这个锁的吞吐率。

Intro

如何节省功耗：

Harware Techniques

• clock gating：Deterministic Clock-Gating for Low-Power

  Clock gating is a popular technique used in many synchronous circuits for reducing dynamic power dissipation. Clock gating saves power by adding more logic to a circuit to prune the clock tree. Pruning the clock disables portions of the circuitry so that the flip-flops in them do not have to switch states. Switching states consumes power. When not being switched, the switching power consumption goes to zero, and only leakage currents are incurred.

  时钟门控（英语：Clock gating）是一种在同步时序逻辑电路的一种时间脉冲信号技术，可以降低芯片功耗。时钟门控通过在电路中增加额外的逻辑单元、优化时钟树结构来节省电能。

• power gating：A Circuit Technique to Reduce Leakage in Deep-Submicron Cache Memories

  Power gating is a technique used in integrated circuit design to reduce power consumption, by shutting off the current to blocks of the circuit that are not in use. In addition to reducing stand-by or leakage power, power gating has the benefit of enabling Iddq testing.

• voltage and frequency scaling

Sof