Algorithms and Specializers for Provably Optimal Implementations with Resiliency and Efficiency
http://aspire.eecs.berkeley.edu
Aspire Goal: Keep computers' performance and energy efficiency improving past end of CMOS transistor scaling until new switch technology deployed
End of General-Purpose Processors:
Most computing happens in specialized, heterogeneous processors Can be 100-1000X more efficient than general-purpose processor
Challenges:
- Hardware design costs
- Software development
ESP: Ensembles of Specialized Processors
Future server and mobile SoCs will have many fixed-function accelerators and a general-purpose programmable multicore
ESP challenge is using specialized engines for general-purpose code
- General-purpose hardware, flexible but inefficient
- Fixed-function hardware, efficient but inflexible
- ParLab Insight: Patterns capture common operations across many applications, each with unique communication and computation structure
- Build an ensemble of specialized engines, each individually optimized for particular pattern but collectively covering application needs
- Aspire Bet: ESP will give efficiency and flexibility
Optimize compute and data movement per pattern
- Dense Engine: Provide sub-matrix load/store operations, support in-register reuse
- Structured Grid Engine: Supports in-register operand reuse across neighborhood
- Sparse Engine: Support load/store of various sparse data structures
- Graph Engine: Provide load/store of bitmap vertex representations, support many outstanding request
- Richer semantics of new load/stores preserved throughout memory system for memory-side optimizations
资料来源: CS250 14Fall