TI3358 GPMC技术手册

7.1 GPMC//GPMC控制器

7.1.1 Introduction//介绍

The general-purpose memory controller (GPMC) is an unified memory controller dedicated to interfacing

external memory devices://它是用来控制扩展内存一类的东西

• Asynchronous SRAM-like memories and application-specific integrated circuit (ASIC) devices//异步类SRAM存储和ASIC设备

• Asynchronous, synchronous, and page mode (only available in non-multiplexed mode) burst NOR flash devices//同步异步和页模式(页模式只支持非多路复用模式)操作NOR flash设备

• NAND Flash

• Pseudo-SRAM devices//仿SRAM设备

 7.1.1.1 GPMC Features//GPMC特征

The general features of the GPMC module include:

• Data path to external memory device can be 16- or 8-bit wide//数据位宽可以是16位或8位

• 32-bit OCPIP 2.0 compliant core, single slave interface. Support non-wrapping and wrapping burst up to 16x32bits.

• Up to 100 MHz external memory clock performance (single device)

• Support for the following memory types://支持以下内存类型

– External asynchronous or synchronous 8-bit width memory or device (non burst device)

– External asynchronous or synchronous 16-bit width memory or device

– External 16-bit non-multiplexed NOR Flash device

– External 16-bit address and data multiplexed NOR Flash device

– External 8-bit and 16-bit NAND flash device

– External 16-bit pSRAM device


• Up to 16-bit ECC support for NAND flash using BCH code (t=4, 8 or 16) or Hamming code for 8-bit or
16-bit NAND-flash, organized with page size of 512 bytes, 1K bytes, or more.
• Support 512M Bytes maximum addressing capability which can be divided into seven independent
chip-select with programmable bank size and base address on 16M Bytes, 32M Bytes, 64M Bytes, or
128M Bytes boundary
• Fully pipelined operation for optimal memory bandwidth usage
• Support external device clock frequency of 1, 2, 3 and 4 divider from L3 clock.
• Support programmable auto-clock gating when there is no access.
• Support Midlereq/SidleAck protocol
• Support the following interface protocols when communicating with external memory or external
devices.
– Asynchronous read/write access
– Asynchronous read page access (4-8-16 Word16)
– Synchronous read/write access
– Synchronous read burst access without wrap capability (4-8-16 Word16)
– Synchronous read burst access with wrap capability (4-8-16 Word16)
• Address and Data multiplexed access
• Each chip-select as independent and programmable control signal timing parameters for Setup and
Hold time. Parameters are set according to the memory device timing parameters, with one L3 clock
cycle timing granularity.
• Flexible internal access time control (wait state) and flexible handshake mode using external WAIT
pins monitoring (up to two WAIT pins)
• Support bus keeping

• Support bus turn around




7.1.3.3.12.3.2.6 Manual Mode (0x0)//手动模式

This mode is intended for short sequences, added manually to a given buffer through the software data port input. A complete page may be built out of several such sequences.//这种模式适用于短时序,手动添加到给定的缓冲区通过软件数据端口的输入。一个完整的页面可能编译出几个这样的时序
To process an arbitrary sequence of 4-bit nibbles, accesses to the software data port shall be made, containing the appropriate data. If the sequence end does not coincide with an access boundary (for example, to process 5 nibbles = 20 bits in 16-bit access mode) and those nibbles need to be skipped, a number of unused nibbles shall be programmed in size1 (in the same example: 5 nibbles to process + 3 to discard = 8 nibbles = exactly 2 x 16-bit accesses: we must program size0 = 5, size1 = 3).

Figure 7-37shows the manual mode sequence and mapping. In this figure, size and size0 are the same parameter.

Figure 7-37. Manual Mode Sequence and Mapping

Section processing sequence:
• One time with buffer
– size0 nibbles of data, processing ON
– size1 nibbles of unused data, processing OFF
Checksum: size0 + size1 nibbles must fit in a whole number of accesses.
In the following sections, S is the number of sectors in the page.

7.1.3.3.12.3.2.7 Mode 0x1

Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• Repeat with buffer 0 to S-1
– size0 nibbles spare, processing ON
– size1 nibbles spare, processing OFF
Checksum: Spare area size (nibbles) = S - (size0 + size1)

7.1.3.3.12.3.2.8 Mode 0xA (10)

Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• Repeat with buffer 0 to S-1
– size0 nibbles spare, processing ON
– 1 nibble pad spare, processing OFF
– size1 nibbles spare, processing OFF
Checksum: Spare area size (nibbles) = S - (size0 + 1 + size1)

7.1.3.3.12.3.2.9 Mode 0x2

Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• Repeat with buffer 0 to S-1
– size0 nibbles spare, processing OFF
– size1 nibbles spare, processing ON
Checksum: Spare area size (nibbles) = S - (size0 + size1)

7.1.3.3.12.3.2.10 Mode 0x3

Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• One time with buffer 0
– size0 nibbles spare, processing ON
• Repeat with buffer 0 to S-1
– size1 nibbles spare, processing ON
Checksum: Spare area size (nibbles) = size0 + (S - size1)

7.1.3.3.12.3.2.11 Mode 0x7
Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• One time with buffer 0
– size0 nibbles spare, processing ON
• Repeat S times (no buffer used)
– size1 nibbles spare, processing OFF
Checksum: Spare area size (nibbles) = size0 + (S - size1)
7.1.3.3.12.3.2.12 Mode 0x8
Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• One time with buffer 0
– size0 nibbles spare, processing ON
• Repeat with buffer 0 to S-1
– 1 nibble padding spare, processing OFF
– size1 nibbles spare, processing ON
Checksum: Spare area size (nibbles) = size0 + (S - (1+size1))
7.1.3.3.12.3.2.13 Mode 0x4
Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• One time (no buffer used)
– size0 nibbles spare, processing OFF
• Repeat with buffer 0 to S-1
– size1 nibbles spare, processing ON
Checksum: Spare area size (nibbles) = size0 + (S - size1)
7.1.3.3.12.3.2.14 Mode 0x9
Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• One time (no buffer used)
– size0 nibbles spare, processing OFF
• Repeat with buffer 0 to S-1
– 1 nibble padding spare, processing OFF
– size1 nibbles spare, processing ON
Checksum: Spare area size (nibbles) = size0 + (S - (1+size1))

7.1.3.3.12.3.2.15 Mode 0x5
Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• Repeat with buffer 0 to S-1
– size0 nibbles spare, processing ON
• Repeat with buffer 0 to S-1
– size1 nibbles spare, processing ON
Checksum: Spare area size (nibbles) = S - (size0 + size1)
7.1.3.3.12.3.2.16 Mode 0xB (11)
Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• Repeat with buffer 0 to S-1
– size0 nibbles spare, processing ON
• Repeat with buffer 0 to S-1
– 1 nibble padding spare, processing OFF
– size1 nibbles spare, processing ON
Checksum: Spare area size (nibbles) = S - (size0 + 1 + size1)
7.1.3.3.12.3.2.17 Mode 0x6
Page processing sequence:
• Repeat with buffer 0 to S-1
– 512-byte data, processing ON
• Repeat with buffer 0 to S-1
– size0 nibbles spare, processing ON
• Repeat S times (no buffer used)
– size1 nibbles spare, processing OFF
Checksum: Spare area size (nibbles) = S - (size0 + size1)

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