基于FPGA Manager的Zynq PL程序写入方案

本文主要描述了如何在Linux系统启动以后,在线将bitstream文件更新到ZYNQ PL的过程及方法。相关内容主要译自xilinx-wiki,其中官网给出了两种方法,分别为Device Tree Overlay和Sysfs interface。由于项目需要,暂只对sysfs interface在线烧录的执行过程作简要介绍和实践,并附有相关的配置脚本文件,更多详情请参照Solution Zynq PL Programming With FPGA Manager

 

1|0内核配置


为保证FPGA Manager可正常使用,需要按图中配置内核相关选项。(在zynq_defconfig里面,这些选项是默认使能的)

1|1配置 Zynq FPGA Manager:


选择:Device Drivers ---> FPGA Configuration Framework

1|2配置Contiguous Memory Allocator:


CONFIG_CMA

Kernel Features --> Contiguous Memory Allocator

CONFIG_DMA_CMA

Select: Device Drivers --> Generic Driver Options → DMA Contiguous Memory Allocator 

2|0工具准备


  • bootgen

 

3|0映像文件准备


使用Bootgen工具,将.bit文件转换成.bin文件

  
  
bootgen -image Full_Bitstream.bif -arch zynq -process_bitstream bin

 其中,Full_Bitstream.bif文件应包含下列内容

  
  
all: { design_1_wrapper.bit /* Bitstream file name */ }

 

4|0执行过程


4|1设置flags为Full Bitstream模式


  
  
echo 0 > /sys/class/fpga_manager/fpga0/flags

4|2通过sysfs提供的接口,下载Bitstream文件到PL


  
  
mkdir -p /lib/ firmware cp /media/design_1_wrapper.bit.bin /lib/firmware/ echo design_1_wrapper.bit.bin > /sys/class/fpga_manager/fpga0/firmware

 正常输出如下:

 

5|0参考脚本


为便于项目使用,笔者将上述过程形成以下两个脚本,其中makebitbin.sh可将.bit文件转换为.bin文件,具体使用方法为:

  注意,该脚本执行前需要配置好Bootgen工具才可以正常使用!

脚本如下: 

   
   
# !/bin/bash # ############################################################################## # # Copyright (C) 2019 by Luego Zhang <zhanglucc@foxmail.com> # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # Reference: # https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841645/Solution+Zynq+PL+Programming+With+FPGA+Manager # ############################################################################### # => Force locale language to be set to English. This avoids issues when doing # text and string processing. export LC_ALL=C LANGUAGE=C LANG= C # => Help and information usage() { printf " NAME $(basename ${BASH_SOURCE}) - generating .bin from .bit file using Bootgen SYNOPSIS $(basename ${BASH_SOURCE}) [option] filename DESCRIPTION In order to load bitstream files to PL through Linux, we need to get one type of file with suffix like '.bit.bin'. Run this script and .bin will be generated with the given file(.bit) using Bootgen. Please run this script in PC. OPTIONS --help Display this help message EXAMPLE Version : 191031v1.0 " exit 0 ; } expr " $* " : " .*--help " > /dev/null && usage # => Setting the development environment variables if [ ! " ${ZN_CONFIG_DONE} " ]; then printf " \033[31m[ERROR]\033[0m Please source the settings64.sh script first\n " exit 1 else # => Setting zynq-7000 development envirionment variables if [ -f " ${ZN_SCRIPTS_DIR}/xilinx/export_xilinx_env.sh " ]; then source ${ZN_SCRIPTS_DIR}/xilinx/ export_xilinx_env.sh else error_exit " Could not find file ${ZN_SCRIPTS_DIR}/xilinx/export_xilinx_env.sh " exit 1 fi fi ZN_SCRIPT_NAME= " $(basename ${BASH_SOURCE}) " ZN_SCRIPT_PATH= " $(dirname ${BASH_SOURCE}) " # ############################################################################### # => The beginning print_info " [ $(date "+%Y/%m/%d %H:%M:%S " ) ] Starting ${BASH_SOURCE}\n " # => Check user input is correct [[ -f $1 ]] || error_exit " $1 not found, please check that the filename is correct\n " echo_info " 1. Create fullbitstream.bif " BIF_FILE= ${ZN_SCRIPT_PATH}/ fullbitstream.bif echo " //arch = zynq; split = yes; format = .bit.bin " > ${BIF_FILE} echo " all: " >> ${BIF_FILE} echo " { " >> ${BIF_FILE} echo " $1 " >> ${BIF_FILE} echo " } " >> ${BIF_FILE} echo_info " 2. Generate .bif file for Bootgen " bootgen -image fullbitstream.bif -arch zynq -process_bitstream bin - w # => The end print_info " [ $(date "+%Y/%m/%d %H:%M:%S " ) ] Finished ${ZN_SCRIPT_NAME}\n "
makebitbin.sh

 另一个脚本为load-fpga-image.sh,该脚本应在开发板上运行,具体使用方法为:

将load-fpga-image.sh脚本和上一步生成的blinkblink.bit.bin文件共同copy至开发板的同一目录下,然后按以下方法执行脚本:

  
  
./load-fpga-image.sh blinkblink.bit.bin

 即可,参考脚本如下:

   
   
# !/bin/bash # ############################################################################## # # Copyright (C) 2019 by Luego Zhang <zhanglucc@foxmail.com> # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # Reference: # https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841645/ \ # Solution+Zynq+PL+Programming+With+FPGA+Manager # ############################################################################### # => Force locale language to be set to English. This avoids issues when doing # text and string processing. export LC_ALL=C LANGUAGE=C LANG= C # => Help and information usage() { printf " NAME $(basename ${BASH_SOURCE}) - load fullbitstream file to PL through Linux SYNOPSIS $(basename ${BASH_SOURCE}) [option] bitstream_file DESCRIPTION Load bitstream file to PL using sysfs interface through Linux. Be careful the type of bitstream_file is .bit.bin file which is generated by Bootgen and bitstream_file should be in the same path with the script. Please run this script on the board! OPTIONS --help Display this help message EXAMPLE Version : 191031v1.0 " exit 0 ; } expr " $* " : " .*--help " > /dev/null && usage # ------------------------------------------------------------------------------ # => Check system environment and make sure fpga manager runs well FPGA_MGR_PATH=/sys/class/fpga_manager/ fpga0 if [ ! -d ${FPGA_MGR_PATH} ]; then printf " \033[31m[ERROR]\033[0m FPGA Manager is not found, please check the driver! " exit 1 fi # => Check that user input is correct if [ ! -f " $1 " ]; then printf " \033[31m[ERROR]\033[0m '$1' not found, please check if the file exists\n " exit 1 fi ZN_SCRIPT_NAME= " $(basename ${BASH_SOURCE}) " ZN_SCRIPT_PATH= " $(dirname ${BASH_SOURCE}) " BITSTREAM= " $1 " FPGA_MGR_FLAGS= ${FPGA_MGR_PATH}/ flags FPGA_MGR_FIRMWARE= ${FPGA_MGR_PATH}/ firmware # ############################################################################### # => The beginning echo " \033[32m[ $(date "+%Y/%m/%d %H:%M:%S " ) ]\033[0m Starting ${ZN_SCRIPT_NAME}\n " # => Set flags for Full Bitstream echo 0 > $FPGA_MGR_FLAGS read flag <<<$(cat $FPGA_MGR_FLAGS ) [ " $flag " = " 0 " ] || $(echo " [error] invalid mode, please check ${FPGA_MGR_FLAGS} " && exit 1 ) # => Loading Bitstream into PL mkdir -p /lib/firmware/ && cp ./ $BITSTREAM /lib/firmware/ echo $BITSTREAM > $FPGA_MGR_FIRMWARE # => The end printf " \033[32m[ $(date "+%Y/%m/%d %H:%M:%S " ) ]\033[0m Finished ${ZN_SCRIPT_NAME}\n "
load-fpga-image

 


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