第六周-Review-memory003

What Every Programmer Should Know About Memory
Ulrich Drepper
Red Hat, Inc.
drepper@redhat.com

Unlike storage subsystems, removing the main memory as a bottleneck has proven much more difficult and almost
all solutions require changes to the hardware. Today these changes mainly come in the following forms:
• RAM hardware design (speed and parallelism).
• Memory controller designs.
• CPU caches.
• Direct memory access (DMA) for devices.
跟存储子系统不同，打破主内存的瓶颈更加困难，而且基本上所有的解决方案都需要改变硬件。如今这些改变主要有以下几种形式：
RAM硬件设计(速度和串行)
内存控制设计
CPU高级缓存
设备的直接内存访问（DMA）
For the most part, this document will deal with CPU caches and some effects of memory controller design.
In the process of exploring these topics, we will explore DMA and bring it into the larger picture. However, we
will start with an overview of the design for today’s commodity hardware. This is a prerequisite to understanding
the problems and the limitations of efficiently using memory subsystems. We will also learn about, in some detail, the different types of RAM and illustrate why these differences still exist.
大多数情况下，本文将讨论CPU高速缓存和一些影响内存控制设计方面的因素。在探索这些主题的过程中，我们将会探索DMA并且将其纳入更大的范围。尽管如此，我们将会以今天的商业硬件的设计回顾来开始整个话题。这个是理解高效使用内存子系统的问题和局限性的先决条件。我们还将更详细的了解不同种类的RAM，并且说明这些差异仍然存在的原因。
This document is in no way all inclusive and final. It is limited to commodity hardware and further limited to a
subset of that hardware. Also, many topics will be discussed in just enough detail for the goals of this paper.
For such topics, readers are recommended to find more detailed documentation.
本文不可能包括所有内容，也不是最终版本。它仅限于商业硬件，并且进一步限制于该硬件的一个子集。同样的，为了实现本文的目标，我们将对很多主题进行详细的讨论。对于这些主题，我们提醒读者查找更详细的文档。