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RSS订阅转载 verilog笔试题
Use verilog hdl to implement a flip-flop with synchronous RESET and SET, a Flip-flop with asynchronous RESET and SET.always@(posedge clk or negedge reset or posedge set)beginif(set)Q<=1;else if(!re
2015-10-22 20:06:19
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转载 verilog面试题
1.Use verilog hdl to implement a flip-flopwith synchronous RESET and SET, a Flip-flop with asynchronous RESET and SET.实现同步置位和复位的触发器。实现异步置位和复位的触发器。always@(posedgeclk or negtive set or negtive reset)if
2015-10-22 19:58:44
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2017-01-14
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