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x86 and x86-64

PC这么久了,对于他的大脑:CPU的结构,架构,类型,发展等一直不是很清楚,很多东西一知半解,知其然不知其所以然,趁着这今天不忙,给自己冲冲电,补充下这方面的知识。

 

目录:

1.32 bit  VS 64 bit

2.x86  and x86-64

3.Instruction Set Architecture (ISA)

1)VAX

2)IBMPower

3)ARM architecture

4)MIPS architecture

5)IA-32

4.CPU架构类型发展

                CPU的指令集(指令系统)

                X86 CPU,IA-32; X86-64,AMD64; EM64T,IA-32e; IA-64(EPIC) 的意思与区别X86系列CPU的历史

                64位微处理器体系结构发展回顾和展望(RISC与 IA-64微处理器的发展历史)(64位微处理器的发展历史)①

               64位微处理器体系结构发展回顾和展望(RISC与 IA-64微处理器的发展历史)(64位微处理器的发展历史)②

                IA-32e与X86-64的发展,关系,与技术分析

                64位技术 概述(从16位-32位-64位)

                Intel安腾处理器(IA64,EPIC架构)介绍

               Intel与AMD的起源、关系 及其三十年的战争

                CPU内核结构

 

 

1.32 bit  VS 64 bit

32-bit

In computer architecture32-bit integersmemory addresses, or other data units are those that are at most 32 bits (4 octets) wide. Also, 32-bit CPU and ALU architectures are those that are based onregistersaddress buses, or data buses of that size. 32-bit is also a term given to a generation of computers in which 32-bit processors are the norm. The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4GiB of byte-addressable memory.

The external address and data buses are often wider than 32 bits but both of these are stored and manipulated internally in the processor as 32-bit quantities. For example, the Pentium Pro processor is a 32-bit machine, but the external address bus is 36 bits wide, and the external data bus is 64 bits wide.[1]

 

64-bit

In computer architecture64-bit integersmemory addresses, or other data units are those that are at most 64 bits (8 octets) wide. Also, 64-bit CPU and ALU architectures are those that are based onregistersaddress buses, or data buses of that size. 64-bit is also a term given to a generation of computers in which 64-bit processors are the norm.

64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s (Cray-1, 1975) and in RISC-based workstations and servers since the early 1990s. In 2003 they were introduced to the (previously 32-bit) mainstream personal computer arena in the form of the x86-64 and 64-bit PowerPC processor architectures.

A 64-bit register can store 264 = 18446744073709551616 different values, a number in excess of 18quintillion. Hence, a processor with 64-bit memory addresses can directly access 264 bytes of byte-addressable memory.

Without further qualification, a 64-bit computer architecture generally has integer and addressingregisters that are 64 bits wide, allowing direct support for 64-bit data types and addresses. However, a CPU might have external data buses or address buses with different sizes from the registers, even larger (the 32-bit Pentium had a 64-bit data bus, for instance). The term may also refer to the size of low-level data types, such as 64-bit floating-point numbers.

 

32-bit vs 64-bit

A change from a 32-bit to a 64-bit architecture is a fundamental alteration, as most operating systems must be extensively modified to take advantage of the new architecture, because that software has to manage the actual memory addressing hardware.[18] Other software must also be ported to use the new capabilities; older 32-bit software may be supported through either a hardware compatibility mode in which the new processors support the older 32-bit version of the instruction set as well as the 64-bit version, through software emulation, or by the actual implementation of a 32-bit processor core within the 64-bit processor, as with the Itanium processors from Intel, which include an IA-32 processor core to run 32-bit x86 applications. The operating systems for those 64-bit architectures generally support both 32-bit and 64-bit applications.[19]

 

2.x86  and x86-64

x86

The term x86 refers to a family of instruction set architectures[2] based on the Intel 8086 CPU. The 8086 was launched in 1978 as a fully 16-bit extension of Intel's 8-bit based 8080 microprocessor and also introducedsegmentation to overcome the 16-bit addressing barrier of such designs. The term x86 derived from the fact that early successors to the 8086 also had names ending in "86". Many additions and extensions have been added to the x86 instruction set over the years, almost consistently with full backward compatibility.[3] The architecture has been implemented in processors from IntelCyrixAMDVIA, and many others.

The term is not synonymous with IBM PC compatibility as this implies a multitude of other computer hardware;embedded systems as well as general-purpose computers used x86 chips before the PC-compatible market started,[4]some of them before the IBM PC itself.

As the term became common after the introduction of the 80386, it usually implies binary compatibility with the 32-bit instruction set of the 80386. This may sometimes be emphasized as x86-32[5] to distinguish it either from the original 16-bit "x86-16" or from the 64-bit x86-64.[6] Although most x86 processors used in new personal computers and servers have 64-bit capabilities, to avoid compatibility problems with older computers or systems, the term x86-64 (or x64) is often used to denote 64-bit software, with the term x86 implying only 32-bit.[7][8]

Although the 8086 was primarily developed for embedded systems and small single-user computers, largely as a response to the successful 8080-compatible Zilog Z80,[9] the x86 line soon grew in features and processing power. Today, x86 is ubiquitous in both stationary and portable personal computers and has replaced midrange computersand RISC-based processors in a majority of servers and workstations as well. A large amount of software, including operating systems (OSs) such as DOSWindowsLinuxBSDSolaris, and Mac OS X supports x86-based hardware.

Modern x86 is relatively uncommon in embedded systems, however, and small low power applications (using tiny batteries) as well as low-cost microprocessor markets, such as home appliances and toys, lack any significant x86 presence.[10] Simple 8-bit and 16-bit based architectures are common here, although the x86-compatible VIA C7,VIA NanoAMD's GeodeAthlon Neo, and Intel Atom are examples of 32- and 64-bit designs used in some relativelylow power and low cost segments.

There have been several attempts, also within Intel itself, to break the market dominance of the "inelegant" x86 architecture that descended directly from the first simple 8-bit microprocessors. Examples of this are the iAPX 432 (alias Intel 8800), the Intel 960Intel 860, and the Intel/Hewlett-Packard Itanium architecture. However, the continuous refinement of x86 microarchitecturescircuitry, and semiconductor manufacturing would prove it hard to replace x86 in many segments. AMD's 64 bit extension of x86 (which Intel eventually responded to with a compatible design)[11] and the scalability of x86 chips such as the eight-core Intel Xeon and 12-core AMD Opteron is underlining x86 as an example of how continuous refinement of established industry standards can resist the competition from completely new architectures.[12]

Note: In the following text, all instances of use of the prefixes kilo/mega/giga/tera are to be understood in the binary (powers-of-1024) sense. See the article on the IEC prefixes (kibi/mebi/gibi/tebi) for details.

 

x86-64

x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other enhancements. The original specification was created by AMD, and has been implemented by AMD, IntelVIA, and others. It is fully backwards compatible with 32-bit code.[1](p13) Because the full 32-bit instruction set remains implemented in hardware without any intervening emulation, existing 32-bit x86executables run with no compatibility or performance penalties,[2] although existing applications that are recoded to take advantage of new features of the processor design may see performance increases.

After launching the architecture under the "x86-64" name, AMD renamed it AMD64 in 2003;[3] Intel initially used the names IA-32e and EM64T before finally settling on Intel 64 for their implementation. x86-64 is still used by many in the industry as a vendor-neutral term, while others, notably Sun Microsystems[4] (now Oracle Corporation) and Microsoft,[5] use x64.

The AMD K8 core was the first to implement the architecture; this was the first significant addition to the x86 architecture designed by a company other than Intel. Intel was forced to follow suit and introduced a modified NetBurst family which was fully software-compatible with AMD's design and specification. VIA Technologies introduced x86-64 in their VIA Isaiah architecture, with the VIA Nano.

The x86-64 specification is distinct from the Intel Itanium (formerly IA-64) architecture, which is not compatible on the native instruction set level with the x86 architecture.

 

3.Instruction Set Architecture(ISA)

VAX

VAX was an instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC) in the mid-1970s. A 32-bit complex instruction set computer (CISC) ISA, it was designed to extend or replace DEC's various Programmed Data Processor (PDP) ISAs. The VAX name was also used by DEC for a family of computer systems based on this processor architecture.

The VAX architecture's primary features were virtual addressing (for example demand paged virtual memory) and its orthogonal instruction set. VAX has been perceived as the quintessential CISC ISA, with its very large number of programmer-friendly addressing modes and machine instructions, highly orthogonal architecture, and instructions for complex operations such as queue insertion or deletion and polynomial evaluation.[1]

 

IBMPower

Term

Description

POWER

Performance Optimization With Enhanced RISC. A microprocessor architecture designed by IBM.

Main article: IBM POWER

PowerPC

Power Performance Computing. A 32/64-bit instruction set for microprocessors derived from POWER, including some new elements. Designed by the AIM alliance; Apple, IBM and Motorola.

Main article: PowerPC

PowerPC-AS

PowerPC-Advanced Series. Codename "Amazon". A purely 64-bit variant of PowerPC, including some elements from the POWER2 specification. Used in IBM's RS64 family processors and newer POWER processors.

Main article: RS64

POWERn

Where n is a number from 1 to 7. A series of high-end microprocessors built by IBM using different combinations of POWER, PowerPC and PowerPC-AS instruction sets.

Main articles: POWER1POWER2POWER3POWER4POWER5POWER6 and POWER7

Cell

Cell Broadband Engine Architecture (CBEA), a microprocessor architecture designed by IBM, Sony and Toshiba, which has Power Architecture as a part.

Main article: Cell microprocessor

Power Architecture

The broad term designating all that is POWER, PowerPC and Cell including software, toolchain and end-user appliances. These are the focus of this article.

Power ISA

A new instruction set, combining late versions of POWER and PowerPC instruction sets. Designed by IBM and Freescale.

 

ARM architecture

ARM is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by ARM Holdings. It was named the Advanced RISC Machine and, before that, the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit instruction set architecture in numbers produced.[2][3] Originally conceived by Acorn Computers for use in its personal computers, the first ARM-based products were the Acorn Archimedes range introduced in 1987.

 

MIPS architecture

MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by MIPS Technologies (formerly MIPS Computer Systems, Inc.). The early MIPS architectures were 32-bit, and later versions were 64-bit. Multiple revisions of the MIPS instruction set exist, including MIPS I, MIPS II, MIPS III, MIPS IV, MIPS V, MIPS32, and MIPS64. The current revisions are MIPS32 (for 32-bit implementations) and MIPS64 (for 64-bit implementations).[1][2] MIPS32 and MIPS64 define a control register set as well as the instruction set.

Several optional extensions are also available, including MIPS-3D which is a simple set of floating-point SIMDinstructions dedicated to common 3D tasks,[3] MDMX (MaDMaX) which is a more extensive integer SIMD instruction set using the 64-bit floating-point registers, MIPS16e which adds compression to the instruction stream to make programs take up less room,[4] and MIPS MT, which adds multithreading capability.[5]

Computer architecture courses in universities and technical schools often study the MIPS architecture.[6] The architecture greatly influenced later RISC architectures such as Alpha.

MIPS implementations are primarily used in embedded systems such as Windows CE devices, routersresidential gateways, and video game consoles such as the Sony PlayStation 2 and PlayStation Portable. Until late 2006, they were also used in many of SGI's computer products. MIPS implementations were also used by Digital Equipment CorporationNECPyramid TechnologySiemens NixdorfTandem Computers and others during the late 1980s and 1990s. In the mid to late 1990s, it was estimated that one in three RISC microprocessors produced were MIPS implementations.[7]

 

IA-32

IA-32 (Intel Architecture, 32-bit), also known as x86-32i386[α] or x86,[α] is the CISC[1] instruction-set architecture of Intel's most commercially successful microprocessors, and was first implemented in the Intel 80386 as a 32-bit extension of x86 architecture. This architecture has defined the instruction set for the family of microprocessors currently installed in most personal computers in the world, although it is now being supplanted byx86-64.

 

 

源文档 <http://en.wikipedia.org/wiki/X86-64>

源文档 <http://en.wikipedia.org/wiki/X86>

源文档 <http://en.wikipedia.org/wiki/IA-32>

源文档 <http://en.wikipedia.org/wiki/IA-32>

源文档 <http://en.wikipedia.org/wiki/MIPS_architecture>

源文档 <http://en.wikipedia.org/wiki/ARM_architecture>

源文档 <http://en.wikipedia.org/wiki/ARM_architecture>

源文档 <http://en.wikipedia.org/wiki/Power_Architecture>

源文档 <http://en.wikipedia.org/wiki/VAX>

源文档 <http://en.wikipedia.org/wiki/64-bit>

源文档 <http://en.wikipedia.org/wiki/64-bit>

源文档 <http://en.wikipedia.org/wiki/64-bit>

源文档 <http://en.wikipedia.org/wiki/32-bit>

 

 

 

 

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