计数器的设计与验证
要注意的一个点:将counter_ip.v设为顶层
`timescale 1ns/1ns
`define clk_period 20
module counter_ip_tb;
reg cin;
reg clk;
wire cout;
wire [3:0]q;
counter_ip counter_ip0(
.cin(cin),
.clock(clk),
.cout(cout),
.q(q)
);
initial clk=1;
always #(`clk_period/2)clk = ~clk;
initial begin
repeat(20)begin
cin = 1'b0;
#(`clk_period*5);
cin = 1'b1;
end
#(`clk_period*200);
$stop;
end
endmodule
计数器IP核调用与验证
需要将counter_top.v设为顶层,且要注意级联代码的编写。
module counter_top(clk,cin,cout,q);
input clk;
input cin;
output cout;
output [7:0]q;
wire cout0;
counter_ip counter_ip0(
.cin(cin),
.clock(clk),
.cout(cout0),
.q(q[3:0])
);
counter_ip counter_ip1(
.cin(cout0),
.clock(clk),
.cout(cout),
.q(q[7:4])
);
endmodule
`timescale 1ns/1ns
`define clk_period 20
module counter_top_tb;
reg clk;
reg cin;
wire cout;
wire [7:0]q;
counter_top counter_top0(
.clk(clk),
.cin(cin),
.cout(cout),
.q(q)
);
initial clk=1;
always #(`clk_period/2)clk = ~clk;
initial begin
repeat(20)begin
cin = 1'b0;
#(`clk_period*5);
cin = 1'b1;
end
#(`clk_period*200);
$stop;
end
endmodule