mips汇编指令（带注释）

MIPS汇编指令

 

Arithmetic Instructions

 

abs    des, src1        # des gets the absolute value of src1.

add(u) des, src1, src2  # des gets src1 + src2.

addi   $t2,$t3,5        # $t2 = $t3 + 5 加16位立即数

addiu  $t2,$t3,5        # $t2 = $t3 + 5 加16位无符号立即数

sub(u) des, src1, src2  # des gets src1 - src2.

div(u) src1, reg2       # Divide src1 by reg2, leaving the quotient in register

                        # lo and the remainder in register hi.

div(u) des, src1, src2  # des gets src1 / src2.  

mul    des, src1, src2  # des gets src1 * src2.

mulo   des, src1, src2  # des gets src1 * src2, with overflow.

mult(u) src1, reg2      # Multiply src1 and reg2, leaving the low-order word

                        # in register lo and the high-order word in register hi.

rem(u) des, src1, src2  # des gets the remainder of dividing src1 by src2.

neg(u) des, src1        # des gets the negative of src1.

and    des, src1, src2  # des gets the bitwise and of src1 and src2.

nor    des, src1, src2  # des gets the bitwise logical nor of src1 and src2.

not    des, src1        # des gets the bitwise logical negation of src1.

or     des, src1, src2  # des gets the bitwise logical or of src1 and src2.

xor    des, src1, src2  # des gets the bitwise exclusive or of src1 and src2.

 

rol    des, src1, src2  # des gets the result of rotating left the contents of src1 by src2 bits.

ror    des, src1, src2  # des gets the result of rotating right the contents of src1 by src2 bits.

sll    des, src1, src2  # des gets src1 shifted left by src2 bits.

sra    des, src1, src2  # Right shift arithmetic.

srl    des, src1, src2  # Right shift logical.

sllv   des, src1, src2  # $t0 = $t1 << $t3，shift left logical

srlv   des, src1, src2  # $t0 = $t1 >> $t3，shift right logical

srav   des, src1, src2  # $t0 = $t1 >> $t3，shift right arithm.

 

Comparison Instructions

 

seq    des, src1, src2  # des 1 if src1 = src2, 0 otherwise.

sne    des, src1, src2  # des 1 if src1 != src2, 0 otherwise.

sge(u) des, src1, src2  # des 1 if src1 >= src2, 0 otherwise.

sgt(u) des, src1, src2  # des 1 if src1 > src2, 0 otherwise.

sle(u) des, src1, src2  # des 1 if src1 <= src2, 0 otherwise.

slt(u) des, src1, src2  # des 1 if src1 < src2, 0 otherwise.  

slti   $t1,$t2,10       # 与立即数比较

 

Branch and Jump Instructions

 

b      lab              # Unconditional branch to lab.

beq    src1, src2, lab  # Branch to lab if src1 = src2 .

bne    src1, src2, lab  # Branch to lab if src1 != src2 .

bge(u) src1, src2, lab  # Branch to lab if src1 >= src2 .

bgt(u) src1, src2, lab  # Branch to lab if src1 > src2 .

ble(u) src1, src2, lab  # Branch to lab if src1 <= src2 .

blt(u) src1, src2, lab  # Branch to lab if src1 < src2 .

beqz   src1, lab        # Branch to lab if src1 = 0.

bnez   src1, lab        # Branch to lab if src1 != 0.

bgez   src1, lab        # Branch to lab if src1 >= 0.

bgtz   src1, lab        # Branch to lab if src1 > 0.

blez   src1, lab        # Branch to lab if src1 <= 0.

bltz   src1, lab        # Branch to lab if src1 < 0.

bgezal src1, lab        # If src1 >= 0, then put the address of the next instruction

                        # into $ra and branch to lab.

bgtzal src1, lab        # If src1 > 0, then put the address of the next instruction

                        # into $ra and branch to lab.

bltzal src1, lab        # If src1 < 0, then put the address of the next instruction

                        # into $ra and branch to lab.

 

j      label            # Jump to label lab.

jr     src1             # Jump to location src1.

jal    label            # Jump to label lab, and store the address of the next instruction in $ra.

jalr   src1             # Jump to location src1, and store the address of the next instruction in $ra.

 

 

Load, Store, and Data Movement

 

(reg)                   $ Contents of reg.

const                   $ A constant address.

const(reg)              $ const + contents of reg.

symbol                  $ The address of symbol.

symbol+const            $ The address of symbol + const.

symbol+const(reg)       $ The address of symbol + const + contents of reg.

 

la     des, addr        # Load the address of a label.

lb(u)  des, addr        # Load the byte at addr into des.

lh(u)  des, addr        # Load the halfword at addr into des.

li     des, const       # Load the constant const into des.

lui    des, const       # Load the constant const into the upper halfword of des,

                        # and set the lower halfword of des to 0.

lw     des, addr        # Load the word at addr into des.

lwl    des, addr

lwr    des, addr

ulh(u) des, addr        # Load the halfword starting at the (possibly unaligned) address addr into des.

ulw    des, addr        # Load the word starting at the (possibly unaligned) address addr into des.

 

sb     src1, addr       # Store the lower byte of register src1 to addr.

sh     src1, addr       # Store the lower halfword of register src1 to addr.

sw     src1, addr       # Store the word in register src1 to addr.

swl    src1, addr       # Store the upper halfword in src to the (possibly unaligned) address addr.

swr    src1, addr       # Store the lower halfword in src to the (possibly unaligned) address addr.

ush    src1, addr       # Store the lower halfword in src to the (possibly unaligned) address addr.

usw    src1, addr       # Store the word in src to the (possibly unaligned) address addr.

 

move   des, src1        # Copy the contents of src1 to des.

mfhi   des              # Copy the contents of the hi register to des.

mflo   des              # Copy the contents of the lo register to des.

mthi   src1             # Copy the contents of the src1 to hi.

mtlo   src1             # Copy the contents of the src1 to lo.

 

Exception Handling

 

rfe                     # Return from exception.

syscall                 # Makes a system call. See 4.6.1 for a list of the SPIM system calls.

break const             # Used by the debugger.

nop                     # An instruction which has no effect (other than taking a cycle to execute).

转自：http://hi.baidu.com/chenxiawei2008/blog/item/4e16af908f8ec997a977a4a5.html