Below is a typical CMOS RAM memory map for an AT PC. Under a 128byte ISA compatible CMOS, 16 bytes (00h-0fh) is the real time clock, 32 bytes (10h-2Fh) is the ISA configuration data, 16 bytes (30h-3Fh) is the BIOS specific configuration data and 64 bytes (40h-7Fh) is the ESCD (Extended System Configuration Data).
| Offset Hex | Offset Dec | Field Size | Function |
| 00h | 0 | 1 byte | RTC seconds. Contains the seconds value of current time |
| 01h | 1 | 1 byte | RTC seconds alarm. Contains the seconds value for the RTC alarm |
| 02h | 2 | 1 byte | RTC minutes. Contains the minutes value of the current time |
| 03h | 3 | 1 byte | RTC minutes alarm. Contains the minutes value for the RTC alarm |
| 04h | 4 | 1 byte | RTC hours. Contains the hours value of the current time |
| 05h | 5 | 1 byte | RTC hours alarm. Contains the hours value for the RTC alarm |
| 06h | 6 | 1 byte | RTC day of week. Contains the current day of the week |
| 07h | 7 | 1 byte | RTC date day. Contains day value of current date |
| 08h | 8 | 1 byte | RTC date month. Contains the month value of current date |
| 09h | 9 | 1 byte | RTC date year. Contains the year value of current date |
| 0Ah | 10 | 1 byte | Status Register A |
| Bit 7 = Update in progress (0 = Date and time can be read, 1 = Time update in progress) | |||
| Bits 6-4 = Time frequency divider (010 = 32.768KHz | |||
| Bits 3-0 = Rate selection frequency (0110 = 1.024KHz square wave frequency) | |||
| 0Bh | 11 | 1 byte | Status Register B |
| Bit 7 = Clock update cycle (0 = Update normally, 1 = Abort update in progress) | |||
| Bit 6 = Periodic interrupt (0 = Disable interrupt (default), 1 = Enable interrupt) | |||
| Bit 5 = Alarm interrupt (0 = Disable interrupt (default), 1 = Enable interrupt) | |||
| Bit 4 = Update ended interrupt (0 = Disable interrupt (default), 1 = Enable interrupt) | |||
| Bit 3 = Status register A square wave frequency (0 = Disable square wave (default), 1 = Enable square wave) | |||
| Bit 2 = 24 hour clock (0 = 24 hour mode (default), 1 = 12 hour mode) | |||
| Bit 1 = Daylight savings time (0 = Disable daylight savings (default), 1 = Enable daylight savings) | |||
| 0Ch | 12 | 1 byte | Status Register C - Read only flags indicating system status conditions |
| Bit 7 = IRQF flag | |||
| Bit 6 = PF flag | |||
| Bit 5 = AF flag | |||
| Bit 4 UF flag | |||
| Bits 3-0 = Reserved | |||
| 0Dh | 13 | 1 byte | Status Register D - Valid CMOS RAM flag on bit 7 (battery condition flag) |
| Bit 7 = Valid CMOS RAM flag (0 = CMOS battery dead, 1 = CMOS battery power good) | |||
| Bit 6-0 = Reserved | |||
| 0Eh | 14 | 1 byte | Diagnostic Status |
| Bit 7 = Real time clock power status (0 = CMOS has not lost power, 1 = CMOS has lost power) | |||
| Bit 6 = CMOS checksum status (0 = Checksum is good, 1 = Checksum is bad) | |||
| Bit 5 = POST configuration information status (0 = Configuration information is valid, 1 = Configuration information in invalid) | |||
| Bit 4 = Memory size compare during POST (0 = POST memory equals configuration, 1 = POST memory not equal to configuration) | |||
| Bit 3 = Fixed disk/adapter initialization (0 = Initialization good, 1 = Initialization bad) | |||
| Bit 2 = CMOS time status indicator (0 = Time is valid, 1 = Time is invalid) | |||
| Bit 1-0 = Reserved | |||
| 0Fh | 15 | 1 byte | CMOS Shutdown Status |
| 00h = Power on or soft reset | |||
| 01h = Memory size pass | |||
| 02h = Memory test pass | |||
| 03h = Memory test fail | |||
| 04h = POST complete; boot system | |||
| 05h = JMP double word pointer with EOI | |||
| 06h = Protected mode tests pass | |||
| 07h = protected mode tests fail | |||
| 08h = Memory size fail | |||
| 09h = Int 15h block move | |||
| 0Ah = JMP double word pointer without EOI | |||
| 0Bh = Used by 80386 | |||
| 10h | 16 | 1 byte | Floppy Disk Drive Types |
| Bits 7-4 = Drive 0 type | |||
| Bits 3-0 = Drive 1 type | |||
| 0000 = None | |||
| 0001 = 360KB | |||
| 0010 = 1.2MB | |||
| 0011 = 720KB | |||
| 0100 = 1.44MB | |||
| 11h | 17 | 1 byte | System Configuration Settings |
| Bit 7 = Mouse support disable/enable | |||
| Bit 6 = Memory test above 1MB disable/enable | |||
| Bit 5 = Memory test tick sound disable/enable | |||
| Bit 4 = Memory parity error check disable/enable | |||
| Bit 3 = Setup utility trigger display disable/enable | |||
| Bit 2 = Hard disk type 47 RAM area (0:300h or upper 1KB of DOS area) | |||
| Bit 1 = Wait for <F1> if any error message disable/enable | |||
| Bit 0 = System boot up with Numlock (off/on) | |||
| 12h | 18 | 1 byte | Hard Disk Types |
| Bits 7-4 = Hard disk 0 type | |||
| Bits 3-0 = Hard disk 1 type | |||
| 0000 = No drive installed | |||
| 0001 = Type 1 installed | |||
| 1110 = Type 14 installed | |||
| 1111 = Type 16-47 (defined later in 19h) | |||
| 13h | 19 | 1 byte | Typematic Parameters |
| Bit 7 = typematic rate programming disable/enabled | |||
| Bit 6-5 = typematic rate delay | |||
| Bit 4-2 = Typematic rate | |||
| 14h | 20 | 1 byte | Installed Equipment |
| Bits 7-6 = Number of floppy disks (00 = 1 floppy disk, 01 = 2 floppy disks) | |||
| Bits 5-4 = Primary display (00 = Use display adapter BIOS, 01 = CGA 40 column, 10 = CGA 80 column, 11 = Monochrome Display Adapter) | |||
| Bit 3 = Display adapter installed/not installed | |||
| Bit 2 = Keyboard installed/not installed | |||
| Bit 1 = math coprocessor installed/not installed | |||
| Bit 0 = Always set to 1 | |||
| 15h | 21 | 1 byte | Base Memory Low Order Byte - Least significant byte |
| 16h | 22 | 1 byte | Base Memory High Order Byte - Most significant byte |
| 17h | 23 | 1 byte | Extended Memory Low Order Byte - Least significant byte |
| 18h | 24 | 1 byte | Extended Memory High Order Byte - Most significant byte |
| 19h | 25 | 1 byte | Hard Disk 0 Extended Type - (10h to 2Eh = Type 16 to 46 respectively) |
| 1Ah | 26 | 1 byte | Hard Disk 1 Extended Type - (10h to 2Eh = Type 16 to 46 respectively) |
| 1Bh | 27 | 1 byte | User Defined Drive C: - Number of cylinders least significant byte |
| 1Ch | 28 | 1 byte | User Defined Drive C: - Number of cylinders most significant byte |
| 1Dh | 29 | 1 byte | User Defined Drive C: - Number of heads |
| 1Eh | 30 | 1 byte | User Defined Drive C: - Write precomp cylinder least significant byte |
| 1Fh | 31 | 1 byte | User Defined Drive C: - Write precomp cylinder most significant byte |
| 20h | 32 | 1 byte | User Defined Drive C: - Control byte |
| 21h | 33 | 1 byte | User Defined Drive C: - Landing zone least significant byte |
| 22h | 34 | 1 byte | User Defined Drive C: - Landing zone most significant byte |
| 23h | 35 | 1 byte | User Defined Drive C: - Number of sectors |
| 24h | 36 | 1 byte | User Defined Drive D: - Number of cylinders least significant byte |
| 25h | 37 | 1 byte | User defined Drive D: - Number of cylinders most significant byte |
| 26h | 38 | 1 byte | User Defined Drive D: - Number of heads |
| 27h | 39 | 1 byte | User Defined Drive D: - Write precomp cylinder least significant byte |
| 28h | 40 | 1 byte | User Defined Drive D: - Write precomp cylinder most significant byte |
| 29h | 41 | 1 byte | User Defined Drive D: - Control byte |
| 2Ah | 42 | 1 byte | User Defined Drive D: - Landing zone least significant byte |
| 2Bh | 43 | 1 byte | User Defined Drive D: - Landing zone most significant byte |
| 2Ch | 44 | 1 byte | User Defined Drive D: - Number of sectors |
| 2Dh | 45 | 1 byte | System Operational Flags |
| Bit 7 = Weitek processor present/absent | |||
| Bit 6 = Floppy drive seek at boot enable/disable | |||
| Bit 5 = System boot sequence | |||
| Bit 4 = System boot CPU speed high/low | |||
| Bit 3 = External cache enable/disable | |||
| Bit 2 = Internal cache enable/disable | |||
| Bit 1 = Fast gate A20 operation enable/disable | |||
| Bit 0 = Turbo switch function enable/disable | |||
| 2Eh | 46 | 1 byte | CMOS Checksum High Order Byte - Most significant byte |
| 2Fh | 47 | 1 byte | CMOS Checksum Low Order Byte - Least significant byte |
| 30h | 48 | 1 byte | Actual Extended Memory Low Order Byte - Least significant byte |
| 31h | 49 | 1 byte | Actual Extended Memory High Order Byte - Most significant byte |
| 32h | 50 | 1 byte | Century Date BCD - Value for century of current date |
| 33h | 51 | 1 byte | POST Information Flags |
| Bit 7 = BIOS length (64KB/128KB) | |||
| Bit 6-1 = reserved | |||
| Bit 0 = POST cache test passed/failed | |||
| 34h | 52 | 1 byte | BIOS and Shadow Option Flags |
| Bit 7 = Boot sector virus protection disabled/enabled | |||
| Bit 6 = Password checking option disabled/enabled | |||
| Bit 5 = Adapter ROM shadow C800h (16KB) disabled/enabled | |||
| Bit 4 = Adapter ROM shadow CC00h (16KB) disabled/enabled | |||
| Bit 3 = Adapter ROM shadow D000h (16KB) disabled/enabled | |||
| Bit 2 = Adapter ROM shadow D400h (16KB) disabled/enabled | |||
| Bit 1 = Adapter ROM shadow D800h (16KB) disabled/enabled | |||
| Bit 0 = Adapter ROM shadow DC00h (16KB) disabled/enabled | |||
| 35h | 53 | 1 byte | BIOS and Shadow Option Flags |
| Bit 7 = Adapter ROM shadow E000h (16KB) disabled/enabled | |||
| Bit 6 = Adapter ROM shadow E400h (16KB) disabled/enabled | |||
| Bit 5 = Adapter ROM shadow E800h (16KB) disabled/enabled | |||
| Bit 4 = Adapter ROM shadow EC00h (16KB) disabled/enabled | |||
| Bit 3 = System ROM shadow F000h (16KB) disabled/enabled | |||
| Bit 2 = Video ROM shadow C000h (16KB) disabled/enabled | |||
| Bit 1 = Video ROM shadow C400h (16KB) disabled/enabled | |||
| Bit 0 = Numeric processor test disabled/enabled | |||
| 36h | 54 | 1 byte | Chipset Specific Information |
| 37h | 55 | 1 byte | Password Seed and Color Option |
| Bit 7-4 = Password seed (do not change) | |||
| Bit 3-0 = Setup screen color palette | |||
| 07h = White on black | |||
| 70h = Black on white | |||
| 17h = White on blue | |||
| 20h = Black on green | |||
| 30h = Black on turquoise | |||
| 47h = White on red | |||
| 57h = White on magenta | |||
| 60h = Black on brown | |||
| 38h-3dh | 56-61 | 6 bytes | Encrypted Password - (do not change) |
| 3Eh | 62 | 1 byte | Extended CMOS Checksum - Most significant byte |
| 3Fh | 63 | 1 byte | Extended CMOS Checksum - Least significant byte |
| 40h | 64 | 1 byte | Model Number Byte |
| 41h | 65 | 1 byte | 1st Serial Number Byte |
| 42h | 66 | 1 byte | 2nd Serial Number Byte |
| 43h | 67 | 1 byte | 3rd Serial Number Byte |
| 44h | 68 | 1 byte | 4th Serial Number Byte |
| 45h | 69 | 1 byte | 5th Serial Number Byte |
| 46h | 70 | 1 byte | 6th Serial Number Byte |
| 47h | 71 | 1 byte | CRC Byte |
| 48h | 72 | 1 byte | Century Byte |
| 49h | 73 | 1 byte | Date Alarm |
| 4Ah | 74 | 1 byte | Extended Control Register 4A |
| 4Bh | 75 | 1 byte | Extended Control register 4B |
| 4Ch | 76 | 1 byte | Reserved |
| 4Dh | 77 | 1 byte | Reserved |
| 4Eh | 78 | 1 byte | Real Time Clock - Address 2 |
| 4Fh | 79 | 1 byte | Real Time Clock - Address 3 |
| 50h | 80 | 1 byte | Extended RAM Address - Least significant byte |
| 51h | 81 | 1 byte | Extended RAM Address - Most significant byte |
| 52h | 82 | 1 byte | Reserved |
| 53h | 83 | 1 byte | Extended RAM Data Port |
| 54h | 84 | 1 byte | Reserved |
| 55h | 85 | 1 byte | Reserved |
| 56h | 86 | 1 byte | Reserved |
| 57h | 87 | 1 byte | Reserved |
| 58h | 88 | 1 byte | Reserved |
| 59h | 89 | 1 byte | Reserved |
| 5Ah | 90 | 1 byte | Reserved |
| 5Bh | 91 | 1 byte | Reserved |
| 5Ch | 92 | 1 byte | Reserved |
| 5Dh | 93 | 1 byte | Reserved |
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