PCI Bus

 

PCI Bus pinout for both 32 bit and 64 bit cards is shown below;
Signal Pins 63-94 are only used on 64 bit PCI bus cards. The PCI pinout for the 32 bit bus stops at the key-way [Spacer], while the 64 bit pin out occupies the entire table. The PCI local bus was used in personal computers to provide expansion slots for add-on cards to the motherboard.
The PCI bus replaced the ISA PC-AT expansion slot in PCs.
The PCI local bus is not the same as the new PCI Express bus which has a completely different pinout.





Peripheral Component Interface Pinout

The number sign in the pinout table below refers to: "A # symbol at the end of a signal name indicates that the signal’s asserted state occurs when it is at a low voltage. The absence of a # symbol indicates that the signal is asserted at a high voltage.

PCI Bus PinOut
Pin #NamePCI Pin DescriptionPin #NamePCI Pin Description
A1TRSTTest Logic Reset [JTAG Bus]B1-12V-12 VDC
A2+12V+12 VDCB2TCKTest Clock [JTAG Bus]
A3TMSTest Mode Select [JTAG Bus]B3GNDGround
A4TDITest Data Input [JTAG Bus]B4TDOTest Data Output [JTAG Bus]
A5+5V+5 VDCB5+5V+5 VDC
A6INTAInterrupt AB6+5V+5 VDC
A7INTCInterrupt CB7INTBInterrupt B
A8+5V+5 VDCB8INTDInterrupt D
A9---ReservedB9PRSNT1Present
A10+5VPower (+5 V or +3.3 V)B10---Reserved
A11---ReservedB11PRSNT2Present
A12GND03Ground or Keyway for 3.3/Universal PWBB12GNDGround or Keyway for 3.3/Universal PWB
A13GND05Ground or Key-way for 3.3/Universal PWBB13GNDGround or Open (Key) for 3.3/Universal PWB
A143.3Vaux--B14RESReserved
A15RESETResetB15GNDGround
A16+5VPower (+5 V or +3.3 V)B16CLKClock
A17GNTGrant PCI useB17GNDGround
A18GND08GroundB18REQRequest
A19PME#Power Management EventB19+5VPower (+5 V or +3.3 V)
A20AD30Address/Data 30B20AD31Address/Data 31
A21+3.3V01+3.3 VDCB21AD29Address/Data 29
A22AD28Address/Data 28B22GNDGround
A23AD26Address/Data 26B23AD27Address/Data 27
A24GND10GroundB24AD25Address/Data 25
A25AD24Address/Data 24B25+3.3V+3.3VDC
A26IDSELInitialization Device SelectB26C/BE3Command, Byte Enable 3
A27+3.3V03+3.3 VDCB27AD23Address/Data 23
A28AD22Address/Data 22B28GNDGround
A29AD20Address/Data 20B29AD21Address/Data 21
A30GND12GroundB30AD19Address/Data 19
A31AD18Address/Data 18B31+3.3V+3.3 VDC
A32AD16Address/Data 16B32AD17Address/Data 17
A33+3.3V05+3.3 VDCB33C/BE2Command, Byte Enable 2
A34FRAMEAddress or Data phaseB34GND13Ground
A35GND14GroundB35IRDY#Initiator Ready
A36TRDY#Target ReadyB36+3.3V06+3.3 VDC
A37GND15GroundB37DEVSELDevice Select
A38STOPStop Transfer CycleB38GND16Ground
A39+3.3V07+3.3 VDCB39LOCK#Lock bus
A40SMBCLKSMB CLK [SMbus Description]B40PERR#Parity Error
A41SMBDATSMB DATA [SMbus Description]B41+3.3V08+3.3 VDC
A42GND17GroundB42SERR#System Error
A43PARParityB43+3.3V09+3.3 VDC
A44AD15Address/Data 15B44C/BE1Command, Byte Enable 1
A45+3.3V10+3.3 VDCB45AD14Address/Data 14
A46AD13Address/Data 13B46GND18Ground
A47AD11Address/Data 11B47AD12Address/Data 12
A48GND19GroundB48AD10Address/Data 10
A49AD9Address/Data 9B49GND20Ground
A50KeywayOpen or Ground for 3.3V PWBB50KeywayOpen or Ground for 3.3V PWB
A51KeywayOpen or Ground for 3.3V PWBB51KeywayOpen or Ground for 3.3V PWB
A52C/BE0Command, Byte Enable 0B52AD8Address/Data 8
A53+3.3V11+3.3 VDCB53AD7Address/Data 7
A54AD6Address/Data 6B54+3.3V12+3.3 VDC
A55AD4Address/Data 4B55AD5Address/Data 5
A56GND21GroundB56AD3Address/Data 3
A57AD2Address/Data 2B57GND22Ground
A58AD0Address/Data 0B58AD1Address/Data 1
A59+5VPower (+5 V or +3.3 V)B59VCC08Power (+5 V or +3.3 V)
A60REQ64Request 64 bitB60ACK64Acknowledge 64 bit
A61VCC11+5 VDCB61VCC10+5 VDC
A62VCC13+5 VDCB62VCC12+5 VDC
64 bit spacer KEYWAY
64 bit spacer KEYWAY
A63GNDGroundB63RESReserved
A64C/BE[7]#Command, Byte Enable 7B64GNDGround
A65C/BE[5]#Command, Byte Enable 5B65C/BE[6]#Command, Byte Enable 6
A66+5VPower (+5 V or +3.3 V)B66C/BE[4]#Command, Byte Enable 4
A67PAR64Parity 64B67GNDGround
A68AD62Address/Data 62B68AD63Address/Data 63
A69GNDGroundB69AD61Address/Data 61
A70AD60Address/Data 60B70+5VPower (+5 V or +3.3 V)
A71AD58Address/Data 58B71AD59Address/Data 59
A72GNDGroundB72AD57Address/Data 57
A73AD56Address/Data 56B73GNDGround
A74AD54Address/Data 54B74AD55Address/Data 55
A75+5VPower (+5 V or +3.3 V)B75AD53Address/Data 53
A76AD52Address/Data 52B76GNDGround
A77AD50Address/Data 50B77AD51Address/Data 51
A78GNDGroundB78AD49Address/Data 49
A79AD48Address/Data 48B79+5VPower (+5 V or +3.3 V)
A80AD46Address/Data 46B80AD47Address/Data 47
A81GNDGroundB81AD45Address/Data 45
A82AD44Address/Data 44B82GNDGround
A83AD42Address/Data 42B83AD43Address/Data 43
A84+5VPower (+5 V or +3.3 V)B84AD41Address/Data 41
A85AD40Address/Data 40B85GNDGround
A86AD38Address/Data 38B86AD39Address/Data 39
A87GNDGroundB87AD37Address/Data 37
A88AD36Address/Data 36B88+5VPower (+5 V or +3.3 V)
A89AD34Address/Data 34B89AD35Address/Data 35
A90GNDGroundB90AD33Address/Data 33
A91AD32Address/Data 32B91GNDGround
A92RESReservedB92RESReserved
A93GNDGroundB93RESReserved
A94RESReservedB94GNDGround

Designer note; the pinout provided on this page relates to the PCI main board connector on the mother board.
Add-in cards [daughter boards may have a slightly different connector pin out.





Internal Buses on the PCI Bus
Address/Data Bus:64bit Address; 64bit Data, Time Multiplexed
System Bus:2bits; Clock/Reset
Interface Control Bus:7bits; Ready, Acknowledge, Stop
Parity Bus:2 bits, 1 for the 32 LSBs and 1 for the 32 MSB bits
Errors Bus:2 bits, 1 for Parity and 1 for System
Command/Byte Enable:8 bits (0-3 @ 32bit, and 4-7@ 64bit Bus)
64MHz Control:6 bits; (2) Enable/Running, (2) Present, (2) Ack/Req
Cache Size:2 Bits
Interrupt bus:4 bits [INTA#, INTB#, INTC#, INTD#]
JTAG Serial Bus:5 Bits [JTAG Signal Description]
Power Supply:+5, +3.3, +12, -12v, GND
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