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InformationPaper:PET-to-MLIR: A polyhedral front-end for MLIRAuthor: Konrad Komisarczyk,Eindhoven University of TechnologyKey words: MLIR C++ Front-endAbstract

InformationPaper:Automatic Generation of Efficient Accelerators for Reconfigurable HardwareAuthor: David KoeplingerKey words:BackgroundsWorkSummary

InformationPaper:Loop Splitting for Efficient Pipelining in High-Level SynthesisAuthor: Junyi LiuKey words:Backgrounds

Improving High Level Synthesis Optimization Opportunity Through Polyhedral TransformationsInformationPaper:Improving High Level Synthesis Optimization Opportunity Through Polyhedral TransformationsAuthor: Wei ZuoKey words: HLS,polyhedralBackgrounds

InformationPaper:Hot & Spicy: Improving Productivity with Python and HLS for FPGAsAuthor: Sam SkalickyKey words: FPGA,PythonBackgroundsToday’s HLS tools still rely on C/C++ which is suitable for conventional embedded platforms, but do not yet su

COMBA: A Comprehensive Model-Based Analysis Framework for High Level Synthesis of Real ApplicationsInformationPaper:COMBA: A Comprehensive Model-Based Analysis Framework for High Level Synthesis of Real ApplicationsAuthor: Jieru zhaoKey words:Backgr

Lin-Analyzer: A High-level Performance Analysis Tool for FPGA-based AcceleratorsInformationPaper:Lin-Analyzer: A High-level Performance Analysis Tool forFPGA-based AcceleratorsAuthor: Guanwen ZhongKey words:DSE，accelerator performance estimationWor

Automated Accelerator Generation and Optimization with Composable, Parallel and Pipeline ArchitectureInformationPaper:Automated Accelerator Generation and Optimization with Composable, Parallel and Pipeline ArchitectureAuthor: Jason CongKey words:Wo

论文笔记（1.ICCAD.2018）InformationPaper:HLS-Based Optimization and Design Space Exploration for Applications with Variable Loop BoundsAuthor:Jason CongKey words:Design space exploration(DSE) Variable loop bounds Loop-carried dependency...