实验课程:EDA技术与应用
实验题目:频率可调方波发生电路并显示其频率(学号为单号)
实验目的:1、掌握可逆计数器的应用
2、撑握按键去抖电路在数字系统中的应用
3、撑握数码管动态扫描电路设计
实验内容:本次实验要求设计一个频率可调的方波发生电路,并显示其频率。频率的调节必须通过按键控制,要求可以通过按键调节频率的上升和下降
实验要求:根据以上实验内容写出实验报告,包括简要的程序设计算法,仿真结果及分析(要求附上软件仿真波形),硬件测试等内容。
代码部分:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity lab3 is
Port(clk,d1,d2,rs,f1,f2:in std_logic;
CLK_1:out std_logic;
o4,o5:out std_logic_vector(6 downto 0) );
end;
architecture a of lab3 is
signal fsum:integer range 1 to 99; --1Hz-99Hz
signal fcount1,fcount2:integer range 0 to 9;
signal dd1,dd2,rss,ff1,ff2:std_logic;
signal zcnt:integer range 0 to 50000000;
component xd is
port(clk,cin:in std_logic;
cout:out std_logic );
end component;
begin
a1:xd port map (clk,rs,rss); --消抖例化使用
a2:xd port map (clk,f1,ff1);
a3:xd port map (clk,f2,ff2);
a4:xd port map (clk,d1,dd1);
a5:xd port map (clk,d2,dd2);
process(clk,dd1,dd2,rss,ff1,ff2)
begin
if clk'event and clk ='1' then
if rss='1' then fcount1<=1;fcount2<=0;
elsif ff1='1' then fcount1 <= fcount1+1;
elsif ff2='1' then fcount2 <= fcount2+1;
end if;
if dd1='1' then fcount1 <= fcount1-1;
elsif dd2='1' then fcount2 <= fcount2-1;
end if;
if(ff1='1' and fcount1=9 and fcount2=9) then fcount1<=1;fcount2<=0; --加法实现1-99循环
elsif (ff1='1' and fcount1=9 ) then fcount1<=0; fcount2<=fcount2+1;
elsif(ff2='1' and fcount2=9) then fcount2<=0;
if(fcount1=0) then fcount1<=1;
end if;
end if;
if(dd1='1' and fcount1=1 and fcount2=0) then fcount1<=9;fcount2<=9;--减法实现1-99循环
elsif(dd2='1' and fcount1=0 and fcount2=1) then fcount1<=9;fcount2<=9;
elsif(dd1='1' and fcount1=0) then fcount1<=9;fcount2<=fcount2-1;
elsif(dd2='1' and fcount2=0) then fcount2<=9;
end if;
end if;
fsum <= fcount1+fcount2*10;
end process;
process(clk)
variable cnt:integer range 0 to 50000000;
begin
if clk'event and clk='1' then cnt:=cnt+1;
if cnt*fsum<25000000 then CLK_1<='0';
elsif cnt*fsum <50000000 then CLK_1<='1';
else cnt:=0;CLK_1<='0';
end if;
end if;
end process;
process(clk)
begin
if clk'event and clk='1' then
case fcount2 is
when 0 => o4<="1111110";
when 1 => o4<="0110000";
when 2 => o4<="1101101";
when 3 => o4<="1111001";
when 4 => o4<="0110011";
when 5 => o4<="1011011";
when 6 => o4<="1011111";
when 7 => o4<="1110000";
when 8 => o4<="1111111";
when 9 => o4<="1111011";
end case;
case fcount1 is
when 0 => o5<="1111110";
when 1 => o5<="0110000";
when 2 => o5<="1101101";
when 3 => o5<="1111001";
when 4 => o5<="0110011";
when 5 => o5<="1011011";
when 6 => o5<="1011111";
when 7 => o5<="1110000";
when 8 => o5<="1111111";
when 9 => o5<="1111011";
end case;
end if;
end process;
end;
资源综合结果如下:
RTL图如下:
引脚配置图
仿真结果如下:
实物连接图及展示如下:
频率设计从1-99分频,这里进行部分频率的分频数码管展示和示波器显示,其实物连接图及示波器图片如下
56hz分频
D1按下为1导致十位减一为46hz分
D2按下为1导致个位减一为55hz分频
指导老师签名: