UART配置
查看原理图,确认管脚
从原理图可以确认,有串口UART3模块可以使用。
这里做了张图,方便以后对管脚。
sys_config.fex配置
[uart3]
uart3_used = 0
uart3_port = 3
uart3_type = 4
uart3_tx = port:PD23<4><1><default><default>
uart3_rx = port:PD24<4><1><default><default>
uart3_rts = port:PD25<4><1><default><default>
uart3_cts = port:PD26<4><1><default><default>
[uart3_suspend]
uart3_tx = port:PD23<7><1><default><default>
uart3_rx = port:PD24<7><1><default><default>
uart3_rts = port:PD25<7><1><default><default>
uart3_cts = port:PD26<7><1><default><default>
从代码看,UART3默认没有打开,我们只需要TX和RX双线串口。代码配置如下。
lemon@ubuntu:~/Develop/OrangePi_Lite2/lichee$ git diff tools/pack/chips/sun50iw6p1/configs/petrel-p1/sys_config.fex
diff --git a/lichee/tools/pack/chips/sun50iw6p1/configs/petrel-p1/sys_config.fex b/lichee/tools/pack/chips/sun50iw6p1/configs/petrel-p1/sys_config.fex
index ec266a9..5e1d76a 100755
--- a/lichee/tools/pack/chips/sun50iw6p1/configs/petrel-p1/sys_config.fex
+++ b/lichee/tools/pack/chips/sun50iw6p1/configs/petrel-p1/sys_config.fex
@@ -348,19 +348,19 @@ uart2_rts = port:PD21<7><1><default><default>
uart2_cts = port:PD22<7><