现代计算机组成原理 - 华侨大学.pdf
PC
CPU
CPU
1PC+1PC
2
n n
lpm_counter1
up counter
sload
d[7..0] INPUT data[7..0] q[7..0] OUTPUT q[7. .0]
VCC
LOAD INPUT
VCC
CLK INPUT
clock r
VCC l
c
a
inst
RST INPUT
VCC
4-26
4-26
lpm_counter1
up counter
sload
d[7..0] INPUT data[7..0] q[7..0] OUTPUT q[7. .0]
VCC
LOAD INPUT