- 数据流建模,输入输出的类型一般为wire
- 行为级建模,输入的类型一般为reg,输出的类型为wire,因为always其中的等号左边的式子的值必须是reg类型的
//数据流建模 module and2(x1, x2, z1); input x1, x2; output z1; wire x1, x2; wire z1; assign z1 = x1 & x2; endmodule
//行为级建模 module or3( x1, x2, x3, z1 ); input x1, x2, x3; output z1; wire x1, x2 , x3; reg z1; always @ (x1 or x2 or x3) // always的变量z1必须为reg类型的 begin z1 = x1 | x2 | x3; end endmodule
从上面也能看出:
- 数据流建模,一般用assign声明描述电路行为(连续赋值语句。因此这里的输出必须设置成wire类型)
- 行为级建模,一般用initial 或者always (过程连续赋值语句,因为这里有always,输出必须设置成reg类型的)
在testbench中,输入是reg类型,输出是wire类型:
//这里有for循环类型的 module or3_tb; reg x1, x2, x3; wire z1; initial begin : apply_stimulus reg [3:0] invec; for(invec = 0; invec < 8; invec = invec + 1) begin {x1, x2 ,x3} = invec [3:0]; #10 $display ("x1x2x3 = %b , z1 = %b ",{x1, x2, x3}, z1); end end or3 inst( .x1(x1), .x2(x2), .x3(x3), .z1(z1) ); endmodule
//类似于 枚举类型的 module add_tb; reg x1, x2; wire z1; //diaplay variables initial $monitor ("x1 = %b, x2 = %b, z1 = %b", x1, x2, z1); //applay initial begin #0 x1 = 1'b0; x2 = 1'b0; #10 x1 = 1'b0; x2 = 1'b1; #10 x1 = 1'b1; x2 = 1'b0; #10 x1 = 1'b1; x2 = 1'b1; #10 $stop; end add ins( .x1(x1), .x2(x2), .z1(z1) ); endmodule
当然还有其它类型