Introduction to the To VCD File Block
A value change dump (VCD) file logs changes to variable values,
such as the values of signals, in a file during a simulation session.
VCD files can be useful during design verification. Some examples
of how you might apply VCD files include the following cases:
For comparing results of multiple simulation runs,
using the same or different simulator environments
As input to post-simulation analysis tools
For porting areas of an existing design to a new design
VCD files can provide data that you might not otherwise acquire unless you understood the
details of a device's internal logic. In addition, they include data that can be
graphically displayed or analyzed with post processing tools, including, for
example, the extraction of data about a particular section of a design hierarchy or
data generated during a specific time interval.
Another example, this specifically for ModelSim® users,
is the ModelSim vcd2wlf tool, which converts
a VCD file to a Wave Log Format (WLF) file that you can view in a ModelSim wave window.
The To VCD File block provided in the HDL Verifier™ block
library serves as a VCD file generator during Simulink® sessions.
The block generates a VCD file that contains information about changes
to signals connected to the block's input ports and names the file
with a specified file name.
Note
The To VCD File block logs changes to states '1' and '0' only.
The block doesnot log changes to states 'X' and 'Z'.