初始化定义
1 #ifndef _MPU6050_H 2 #define _MPU6050_H 3 4 #define PORT_USED 0 5 6 #define MPU6050_ADDRESS_AD0_LOW 0x68 // address pin low (GND), default for InvenSense evaluation board 7 #define MPU6050_ADDRESS_AD0_HIGH 0x69 // address pin high (VCC) 8 #define MPU6050_DEFAULT_ADDRESS (MPU6050_ADDRESS_AD0_LOW<<1) 9 #define MPU6050_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD 10 #define MPU6050_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD 11 #define MPU6050_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD 12 #define MPU6050_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN 13 #define MPU6050_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN 14 #define MPU6050_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN 15 #define MPU6050_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS 16 #define MPU6050_RA_XA_OFFS_L_TC 0x07 17 #define MPU6050_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS 18 #define MPU6050_RA_YA_OFFS_L_TC 0x09 19 #define MPU6050_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS 20 #define MPU6050_RA_ZA_OFFS_L_TC 0x0B 21 #define MPU6050_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR 22 #define MPU6050_RA_XG_OFFS_USRL 0x14 23 #define MPU6050_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR 24 #define MPU6050_RA_YG_OFFS_USRL 0x16 25 #define MPU6050_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR 26 #define MPU6050_RA_ZG_OFFS_USRL 0x18 27 #define MPU6050_RA_SMPLRT_DIV 0x19 28 #define MPU6050_RA_CONFIG 0x1A 29 #define MPU6050_RA_GYRO_CONFIG 0x1B 30 #define MPU6050_RA_ACCEL_CONFIG 0x1C 31 #define MPU6050_RA_FF_THR 0x1D 32 #define MPU6050_RA_FF_DUR 0x1E 33 #define MPU6050_RA_MOT_THR 0x1F 34 #define MPU6050_RA_MOT_DUR 0x20 35 #define MPU6050_RA_ZRMOT_THR 0x21 36 #define MPU6050_RA_ZRMOT_DUR 0x22 37 #define MPU6050_RA_FIFO_EN 0x23 38 #define MPU6050_RA_I2C_MST_CTRL 0x24 39 #define MPU6050_RA_I2C_SLV0_ADDR 0x25 40 #define MPU6050_RA_I2C_SLV0_REG 0x26 41 #define MPU6050_RA_I2C_SLV0_CTRL 0x27 42 #define MPU6050_RA_I2C_SLV1_ADDR 0x28 43 #define MPU6050_RA_I2C_SLV1_REG 0x29 44 #define MPU6050_RA_I2C_SLV1_CTRL 0x2A 45 #define MPU6050_RA_I2C_SLV2_ADDR 0x2B 46 #define MPU6050_RA_I2C_SLV2_REG 0x2C 47 #define MPU6050_RA_I2C_SLV2_CTRL 0x2D 48 #define MPU6050_RA_I2C_SLV3_ADDR 0x2E 49 #define MPU6050_RA_I2C_SLV3_REG 0x2F 50 #define MPU6050_RA_I2C_SLV3_CTRL 0x30 51 #define MPU6050_RA_I2C_SLV4_ADDR 0x31 52 #define MPU6050_RA_I2C_SLV4_REG 0x32 53 #define MPU6050_RA_I2C_SLV4_DO 0x33 54 #define MPU6050_RA_I2C_SLV4_CTRL 0x34 55 #define MPU6050_RA_I2C_SLV4_DI 0x35 56 #define MPU6050_RA_I2C_MST_STATUS 0x36 57 #define MPU6050_RA_INT_PIN_CFG 0x37 58 #define MPU6050_RA_INT_ENABLE 0x38 59 #define MPU6050_RA_DMP_INT_STATUS 0x39 60 #define MPU6050_RA_INT_STATUS 0x3A 61 #define MPU6050_RA_ACCEL_XOUT_H 0x3B 62 #define MPU6050_RA_ACCEL_XOUT_L 0x3C 63 #define MPU6050_RA_ACCEL_YOUT_H 0x3D 64 #define MPU6050_RA_ACCEL_YOUT_L 0x3E 65 #define MPU6050_RA_ACCEL_ZOUT_H 0x3F 66 #define MPU6050_RA_ACCEL_ZOUT_L 0x40 67 #define MPU6050_RA_TEMP_OUT_H 0x41 68 #define MPU6050_RA_TEMP_OUT_L 0x42 69 #define MPU6050_RA_GYRO_XOUT_H 0x43 70 #define MPU6050_RA_GYRO_XOUT_L 0x44 71 #define MPU6050_RA_GYRO_YOUT_H 0x45 72 #define MPU6050_RA_GYRO_YOUT_L 0x46 73 #define MPU6050_RA_GYRO_ZOUT_H 0x47 74 #define MPU6050_RA_GYRO_ZOUT_L 0x48 75 #define MPU6050_RA_EXT_SENS_DATA_00 0x49 76 #define MPU6050_RA_EXT_SENS_DATA_01 0x4A 77 #define MPU6050_RA_EXT_SENS_DATA_02 0x4B 78 #define MPU6050_RA_EXT_SENS_DATA_03 0x4C 79 #define MPU6050_RA_EXT_SENS_DATA_04 0x4D 80 #define MPU6050_RA_EXT_SENS_DATA_05 0x4E 81 #define MPU6050_RA_EXT_SENS_DATA_06 0x4F 82 #define MPU6050_RA_EXT_SENS_DATA_07 0x50 83 #define MPU6050_RA_EXT_SENS_DATA_08 0x51 84 #define MPU6050_RA_EXT_SENS_DATA_09 0x52 85 #define MPU6050_RA_EXT_SENS_DATA_10 0x53 86 #define MPU6050_RA_EXT_SENS_DATA_11 0x54 87 #define MPU6050_RA_EXT_SENS_DATA_12 0x55 88 #define MPU6050_RA_EXT_SENS_DATA_13 0x56 89 #define MPU6050_RA_EXT_SENS_DATA_14 0x57 90 #define MPU6050_RA_EXT_SENS_DATA_15 0x58 91 #define MPU6050_RA_EXT_SENS_DATA_16 0x59 92 #define MPU6050_RA_EXT_SENS_DATA_17 0x5A 93 #define MPU6050_RA_EXT_SENS_DATA_18 0x5B 94 #define MPU6050_RA_EXT_SENS_DATA_19 0x5C 95 #define MPU6050_RA_EXT_SENS_DATA_20 0x5D 96 #define MPU6050_RA_EXT_SENS_DATA_21 0x5E 97 #define MPU6050_RA_EXT_SENS_DATA_22 0x5F 98 #define MPU6050_RA_EXT_SENS_DATA_23 0x60 99 #define MPU6050_RA_MOT_DETECT_STATUS 0x61 100 #define MPU6050_RA_I2C_SLV0_DO 0x63 101 #define MPU6050_RA_I2C_SLV1_DO 0x64 102 #define MPU6050_RA_I2C_SLV2_DO 0x65 103 #define MPU6050_RA_I2C_SLV3_DO 0x66 104 #define MPU6050_RA_I2C_MST_DELAY_CTRL 0x67 105 #define MPU6050_RA_SIGNAL_PATH_RESET 0x68 106 #define MPU6050_RA_MOT_DETECT_CTRL 0x69 107 #define MPU6050_RA_USER_CTRL 0x6A 108 #define MPU6050_RA_PWR_MGMT_1 0x6B 109 #define MPU6050_RA_PWR_MGMT_2 0x6C 110 #define MPU6050_RA_BANK_SEL 0x6D 111 #define MPU6050_RA_MEM_START_ADDR 0x6E 112 #define MPU6050_RA_MEM_R_W 0x6F 113 #define MPU6050_RA_DMP_CFG_1 0x70 114 #define MPU6050_RA_DMP_CFG_2 0x71 115 #define MPU6050_RA_FIFO_COUNTH 0x72 116 #define MPU6050_RA_FIFO_COUNTL 0x73 117 #define MPU6050_RA_FIFO_R_W 0x74 118 #define MPU6050_RA_WHO_AM_I 0x75 119 120 #define MPU6050_TC_PWR_MODE_BIT 7 121 #define MPU6050_TC_OFFSET_BIT 6 122 #define MPU6050_TC_OFFSET_LENGTH 6 123 #define MPU6050_TC_OTP_BNK_VLD_BIT 0 124 125 #define MPU6050_VDDIO_LEVEL_VLOGIC 0 126 #define MPU6050_VDDIO_LEVEL_VDD 1 127 128 #define MPU6050_CFG_EXT_SYNC_SET_BIT 5 129 #define MPU6050_CFG_EXT_SYNC_SET_LENGTH 3 130 #define MPU6050_CFG_DLPF_CFG_BIT 2 131 #define MPU6050_CFG_DLPF_CFG_LENGTH 3 132 133 #define MPU6050_EXT_SYNC_DISABLED 0x0 134 #define MPU6050_EXT_SYNC_TEMP_OUT_L 0x1 135 #define MPU6050_EXT_SYNC_GYRO_XOUT_L 0x2 136 #define MPU6050_EXT_SYNC_GYRO_YOUT_L 0x3 137 #define MPU6050_EXT_SYNC_GYRO_ZOUT_L 0x4 138 #define MPU6050_EXT_SYNC_ACCEL_XOUT_L 0x5 139 #define MPU6050_EXT_SYNC_ACCEL_YOUT_L 0x6 140 #define MPU6050_EXT_SYNC_ACCEL_ZOUT_L 0x7 141 142 #define MPU6050_DLPF_BW_256 0x00 143 #define MPU6050_DLPF_BW_188 0x01 144 #define MPU6050_DLPF_BW_98 0x02 145 #define MPU6050_DLPF_BW_42 0x03 146 #define MPU6050_DLPF_BW_20 0x04 147 #define MPU6050_DLPF_BW_10 0x05 148 #define MPU6050_DLPF_BW_5 0x06 149 150 #define MPU6050_GCONFIG_FS_SEL_BIT 4 151 #define MPU6050_GCONFIG_FS_SEL_LENGTH 2 152 153 #define MPU6050_GYRO_FS_250 0x00 154 #define MPU6050_GYRO_FS_500 0x01 155 #define MPU6050_GYRO_FS_1000 0x02 156 #define MPU6050_GYRO_FS_2000 0x03 157 158 #define MPU6050_ACONFIG_XA_ST_BIT 7 159 #define MPU6050_ACONFIG_YA_ST_BIT 6 160 #define MPU6050_ACONFIG_ZA_ST_BIT 5 161 #define MPU6050_ACONFIG_AFS_SEL_BIT 4 162 #define MPU6050_ACONFIG_AFS_SEL_LENGTH 2 163 #define MPU6050_ACONFIG_ACCEL_HPF_BIT 2 164 #define MPU6050_ACONFIG_ACCEL_HPF_LENGTH 3 165 166 #define MPU6050_ACCEL_FS_2 0x00 167 #define MPU6050_ACCEL_FS_4 0x01 168 #define MPU6050_ACCEL_FS_8 0x02 169 #define MPU6050_ACCEL_FS_16 0x03 170 171 #define MPU6050_DHPF_RESET 0x00 172 #define MPU6050_DHPF_5 0x01 173 #define MPU6050_DHPF_2P5 0x02 174 #define MPU6050_DHPF_1P25 0x03 175 #define MPU6050_DHPF_0P63 0x04 176 #define MPU6050_DHPF_HOLD 0x07 177 178 #define MPU6050_TEMP_FIFO_EN_BIT 7 179 #define MPU6050_XG_FIFO_EN_BIT 6 180 #define MPU6050_YG_FIFO_EN_BIT 5 181 #define MPU6050_ZG_FIFO_EN_BIT 4 182 #define MPU6050_ACCEL_FIFO_EN_BIT 3 183 #define MPU6050_SLV2_FIFO_EN_BIT 2 184 #define MPU6050_SLV1_FIFO_EN_BIT 1 185 #define MPU6050_SLV0_FIFO_EN_BIT 0 186 187 #define MPU6050_MULT_MST_EN_BIT 7 188 #define MPU6050_WAIT_FOR_ES_BIT 6 189 #define MPU6050_SLV_3_FIFO_EN_BIT 5 190 #define MPU6050_I2C_MST_P_NSR_BIT 4 191 #define MPU6050_I2C_MST_CLK_BIT 3 192 #define MPU6050_I2C_MST_CLK_LENGTH 4 193 194 #define MPU6050_CLOCK_DIV_348 0x0 195 #define MPU6050_CLOCK_DIV_333 0x1 196 #define MPU6050_CLOCK_DIV_320 0x2 197 #define MPU6050_CLOCK_DIV_308 0x3 198 #define MPU6050_CLOCK_DIV_296 0x4 199 #define MPU6050_CLOCK_DIV_286 0x5 200 #define MPU6050_CLOCK_DIV_276 0x6 201 #define MPU6050_CLOCK_DIV_267 0x7 202 #define MPU6050_CLOCK_DIV_258 0x8 203 #define MPU6050_CLOCK_DIV_500 0x9 204 #define MPU6050_CLOCK_DIV_471 0xA 205 #define MPU6050_CLOCK_DIV_444 0xB 206 #define MPU6050_CLOCK_DIV_421 0xC 207 #define MPU6050_CLOCK_DIV_400 0xD 208 #define MPU6050_CLOCK_DIV_381 0xE 209 #define MPU6050_CLOCK_DIV_364 0xF 210 211 #define MPU6050_I2C_SLV_RW_BIT 7 212 #define MPU6050_I2C_SLV_ADDR_BIT 6 213 #define MPU6050_I2C_SLV_ADDR_LENGTH 7 214 #define MPU6050_I2C_SLV_EN_BIT 7 215 #define MPU6050_I2C_SLV_BYTE_SW_BIT 6 216 #define MPU6050_I2C_SLV_REG_DIS_BIT 5 217 #define MPU6050_I2C_SLV_GRP_BIT 4 218 #define MPU6050_I2C_SLV_LEN_BIT 3 219 #define MPU6050_I2C_SLV_LEN_LENGTH 4 220 221 #define MPU6050_I2C_SLV4_RW_BIT 7 222 #define MPU6050_I2C_SLV4_ADDR_BIT 6 223 #define MPU6050_I2C_SLV4_ADDR_LENGTH 7 224 #define MPU6050_I2C_SLV4_EN_BIT 7 225 #define MPU6050_I2C_SLV4_INT_EN_BIT 6 226 #define MPU6050_I2C_SLV4_REG_DIS_BIT 5 227 #define MPU6050_I2C_SLV4_MST_DLY_BIT 4 228 #define MPU6050_I2C_SLV4_MST_DLY_LENGTH 5 229 230 #define MPU6050_MST_PASS_THROUGH_BIT 7 231 #define MPU6050_MST_I2C_SLV4_DONE_BIT 6 232 #define MPU6050_MST_I2C_LOST_ARB_BIT 5 233 #define MPU6050_MST_I2C_SLV4_NACK_BIT 4 234 #define MPU6050_MST_I2C_SLV3_NACK_BIT 3 235 #define MPU6050_MST_I2C_SLV2_NACK_BIT 2 236 #define MPU6050_MST_I2C_SLV1_NACK_BIT 1 237 #define MPU6050_MST_I2C_SLV0_NACK_BIT 0 238 239 #define MPU6050_INTCFG_INT_LEVEL_BIT 7 240 #define MPU6050_INTCFG_INT_OPEN_BIT 6 241 #define MPU6050_INTCFG_LATCH_INT_EN_BIT 5 242 #define MPU6050_INTCFG_INT_RD_CLEAR_BIT 4 243 #define MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT 3 244 #define MPU6050_INTCFG_FSYNC_INT_EN_BIT 2 245 #define MPU6050_INTCFG_I2C_BYPASS_EN_BIT 1 246 #define MPU6050_INTCFG_CLKOUT_EN_BIT 0 247 248 #define MPU6050_INTMODE_ACTIVEHIGH 0x00 249 #define MPU6050_INTMODE_ACTIVELOW 0x01 250 251 #define MPU6050_INTDRV_PUSHPULL 0x00 252 #define MPU6050_INTDRV_OPENDRAIN 0x01 253 254 #define MPU6050_INTLATCH_50USPULSE 0x00 255 #define MPU6050_INTLATCH_WAITCLEAR 0x01 256 257 #define MPU6050_INTCLEAR_STATUSREAD 0x00 258 #define MPU6050_INTCLEAR_ANYREAD 0x01 259 260 #define MPU6050_INTERRUPT_FF_BIT 7 261 #define MPU6050_INTERRUPT_MOT_BIT 6 262 #define MPU6050_INTERRUPT_ZMOT_BIT 5 263 #define MPU6050_INTERRUPT_FIFO_OFLOW_BIT 4 264 #define MPU6050_INTERRUPT_I2C_MST_INT_BIT 3 265 #define MPU6050_INTERRUPT_PLL_RDY_INT_BIT 2 266 #define MPU6050_INTERRUPT_DMP_INT_BIT 1 267 #define MPU6050_INTERRUPT_DATA_RDY_BIT 0 268 269 // TODO: Need to work on DMP related things 270 #define MPU6050_DMPINT_5_BIT 5 271 #define MPU6050_DMPINT_4_BIT 4 272 #define MPU6050_DMPINT_3_BIT 3 273 #define MPU6050_DMPINT_2_BIT 2 274 #define MPU6050_DMPINT_1_BIT 1 275 #define MPU6050_DMPINT_0_BIT 0 276 277 #define MPU6050_MOTION_MOT_XNEG_BIT 7 278 #define MPU6050_MOTION_MOT_XPOS_BIT 6 279 #define MPU6050_MOTION_MOT_YNEG_BIT 5 280 #define MPU6050_MOTION_MOT_YPOS_BIT 4 281 #define MPU6050_MOTION_MOT_ZNEG_BIT 3 282 #define MPU6050_MOTION_MOT_ZPOS_BIT 2 283 #define MPU6050_MOTION_MOT_ZRMOT_BIT 0 284 285 #define MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT 7 286 #define MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT 4 287 #define MPU6050_DELAYCTRL_I2C_SLV3_DLY_EN_BIT 3 288 #define MPU6050_DELAYCTRL_I2C_SLV2_DLY_EN_BIT 2 289 #define MPU6050_DELAYCTRL_I2C_SLV1_DLY_EN_BIT 1 290 #define MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT 0 291 292 #define MPU6050_PATHRESET_GYRO_RESET_BIT 2 293 #define MPU6050_PATHRESET_ACCEL_RESET_BIT 1 294 #define MPU6050_PATHRESET_TEMP_RESET_BIT 0 295 296 #define MPU6050_DETECT_ACCEL_ON_DELAY_BIT 5 297 #define MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH 2 298 #define MPU6050_DETECT_FF_COUNT_BIT 3 299 #define MPU6050_DETECT_FF_COUNT_LENGTH 2 300 #define MPU6050_DETECT_MOT_COUNT_BIT 1 301 #define MPU6050_DETECT_MOT_COUNT_LENGTH 2 302 303 #define MPU6050_DETECT_DECREMENT_RESET 0x0 304 #define MPU6050_DETECT_DECREMENT_1 0x1 305 #define MPU6050_DETECT_DECREMENT_2 0x2 306 #define MPU6050_DETECT_DECREMENT_4 0x3 307 308 #define MPU6050_USERCTRL_DMP_EN_BIT 7 309 #define MPU6050_USERCTRL_FIFO_EN_BIT 6 310 #define MPU6050_USERCTRL_I2C_MST_EN_BIT 5 311 #define MPU6050_USERCTRL_I2C_IF_DIS_BIT 4 312 #define MPU6050_USERCTRL_DMP_RESET_BIT 3 313 #define MPU6050_USERCTRL_FIFO_RESET_BIT 2 314 #define MPU6050_USERCTRL_I2C_MST_RESET_BIT 1 315 #define MPU6050_USERCTRL_SIG_COND_RESET_BIT 0 316 317 #define MPU6050_PWR1_DEVICE_RESET_BIT 7 318 #define MPU6050_PWR1_SLEEP_BIT 6 319 #define MPU6050_PWR1_CYCLE_BIT 5 320 #define MPU6050_PWR1_TEMP_DIS_BIT 3 321 #define MPU6050_PWR1_CLKSEL_BIT 2 322 #define MPU6050_PWR1_CLKSEL_LENGTH 3 323 324 #define MPU6050_CLOCK_INTERNAL 0x00 325 #define MPU6050_CLOCK_PLL_XGYRO 0x01 326 #define MPU6050_CLOCK_PLL_YGYRO 0x02 327 #define MPU6050_CLOCK_PLL_ZGYRO 0x03 328 #define MPU6050_CLOCK_PLL_EXT32K 0x04 329 #define MPU6050_CLOCK_PLL_EXT19M 0x05 330 #define MPU6050_CLOCK_KEEP_RESET 0x07 331 332 #define MPU6050_PWR2_LP_WAKE_CTRL_BIT 7 333 #define MPU6050_PWR2_LP_WAKE_CTRL_LENGTH 2 334 #define MPU6050_PWR2_STBY_XA_BIT 5 335 #define MPU6050_PWR2_STBY_YA_BIT 4 336 #define MPU6050_PWR2_STBY_ZA_BIT 3 337 #define MPU6050_PWR2_STBY_XG_BIT 2 338 #define MPU6050_PWR2_STBY_YG_BIT 1 339 #define MPU6050_PWR2_STBY_ZG_BIT 0 340 341 #define MPU6050_WAKE_FREQ_1P25 0x0 342 #define MPU6050_WAKE_FREQ_2P5 0x1 343 #define MPU6050_WAKE_FREQ_5 0x2 344 #define MPU6050_WAKE_FREQ_10 0x3 345 346 #define MPU6050_BANKSEL_PRFTCH_EN_BIT 6 347 #define MPU6050_BANKSEL_CFG_USER_BANK_BIT 5 348 #define MPU6050_BANKSEL_MEM_SEL_BIT 4 349 #define MPU6050_BANKSEL_MEM_SEL_LENGTH 5 350 351 #define MPU6050_WHO_AM_I_BIT 6 352 #define MPU6050_WHO_AM_I_LENGTH 6 353 354 #define MPU6050_DMP_MEMORY_BANKS 8 355 #define MPU6050_DMP_MEMORY_BANK_SIZE 256 356 #define MPU6050_DMP_MEMORY_CHUNK_SIZE 16 357 358 359 void MPU6050_Read(unsigned char SlaveAddress,unsigned char REG_Address,unsigned char readNum); 360 361 void MPU6050_WriteBits(uint8_t slaveAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t data); 362 void MPU6050_WriteBit(uint8_t slaveAddr, uint8_t regAddr, uint8_t bitNum, uint8_t data); 363 void MPU6050_ReadBits(uint8_t slaveAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t *data); 364 365 void MPU6050_Initialize(void); 366 367 uint8_t MPU6050_GetDeviceID(void); 368 uint8_t MPU6050_TestConnection(void); 369 370 void MPU6050_GetRawAccelGyro(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz); 371 372 #endif 373 /***************************************************************************** 374 ** End Of File 375 ******************************************************************************/
MPU6050
1 #include "lpc17xx.h" 2 #include "type.h" 3 #include "i2c.h" 4 #include "MPU6050.h" 5 6 //volatile int16_t ax = 0, ay = 0, az = 0; 7 //volatile int16_t gx = 0, gy = 0, gz = 0; 8 extern volatile uint8_t I2CMasterBuffer[I2C_PORT_NUM][BUFSIZE]; 9 extern volatile uint8_t I2CSlaveBuffer[I2C_PORT_NUM][BUFSIZE]; 10 extern volatile uint32_t I2CReadLength[I2C_PORT_NUM]; 11 extern volatile uint32_t I2CWriteLength[I2C_PORT_NUM]; 12 13 void DelayI2C(uint32_t m) 14 { 15 uint32_t i; 16 17 for(; m != 0; m--) 18 for (i=0; i<5; i++); 19 } 20 21 void MPU6050_Read(unsigned char SlaveAddress,unsigned char REG_Address,unsigned char readNum) 22 {// unsigned char REG_data; 23 I2CWriteLength[PORT_USED] = 2; 24 I2CReadLength[PORT_USED] = 0; 25 I2CMasterBuffer[PORT_USED][0] = SlaveAddress; 26 I2CMasterBuffer[PORT_USED][1] = REG_Address; //0x31; 27 I2CEngine(PORT_USED); 28 29 // DelayI2C(100); 30 31 I2CWriteLength[PORT_USED] = 1; 32 I2CReadLength[PORT_USED] = readNum; 33 I2CMasterBuffer[PORT_USED][0] = SlaveAddress|0x01; 34 I2CEngine(PORT_USED); 35 36 // DelayI2C(100); 37 I2CWriteLength[PORT_USED] = 1; 38 I2CReadLength[PORT_USED] = 0; 39 I2CMasterBuffer[PORT_USED][0] = SlaveAddress; 40 I2CEngine(PORT_USED); 41 } 42 void MPU6050_Write(unsigned char SlaveAddress,unsigned char REG_Address,unsigned char REG_data) //void 43 { 44 I2CWriteLength[PORT_USED] = 3; 45 I2CReadLength[PORT_USED] = 0; 46 I2CMasterBuffer[PORT_USED][0] = SlaveAddress; 47 I2CMasterBuffer[PORT_USED][1] = REG_Address;//0x31; 48 I2CMasterBuffer[PORT_USED][2] = REG_data;//0x2B; 49 // I2CCmd = 0x01; 50 I2CEngine(PORT_USED); 51 } 52 53 void MPU6050_WriteBits(uint8_t slaveAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t data) 54 { 55 // 010 value to write 56 // 76543210 bit numbers 57 // xxx args: bitStart=4, length=3 58 // 00011100 mask byte 59 // 10101111 original value (sample) 60 // 10100011 original & ~mask 61 // 10101011 masked | value 62 uint8_t tmp; 63 uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1); 64 MPU6050_Read(slaveAddr, regAddr, 1); 65 tmp = I2CSlaveBuffer[PORT_USED][0]; 66 // uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1); 67 data <<= (bitStart - length + 1); // shift data into correct position 68 data &= mask; // zero all non-important bits in data 69 tmp &= ~(mask); // zero all important bits in existing byte 70 tmp |= data; // combine data with existing byte 71 MPU6050_Write(slaveAddr,regAddr,tmp); 72 } 73 74 void MPU6050_WriteBit(uint8_t slaveAddr, uint8_t regAddr, uint8_t bitNum, uint8_t data) 75 { 76 uint8_t tmp; 77 MPU6050_Read(slaveAddr, regAddr, 1); 78 tmp = I2CSlaveBuffer[PORT_USED][0]; 79 tmp = (data != 0) ? (tmp | (1 << bitNum)) : (tmp & ~(1 << bitNum)); 80 MPU6050_Write(slaveAddr,regAddr,tmp); 81 } 82 83 void MPU6050_ReadBits(uint8_t slaveAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t *data) 84 { 85 // 01101001 read byte 86 // 76543210 bit numbers 87 // xxx args: bitStart=4, length=3 88 // 010 masked 89 // -> 010 shifted 90 uint8_t tmp; 91 uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1); 92 MPU6050_Read(slaveAddr, regAddr, 1); 93 tmp = I2CSlaveBuffer[PORT_USED][0]; 94 // uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1); 95 tmp &= mask; 96 tmp >>= (bitStart - length + 1); 97 *data = tmp; 98 } 99 100 void MPU6050_Initialize(void) 101 { 102 MPU6050_WriteBits(MPU6050_DEFAULT_ADDRESS, MPU6050_RA_PWR_MGMT_1, 103 MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, MPU6050_CLOCK_PLL_XGYRO); 104 MPU6050_WriteBits(MPU6050_DEFAULT_ADDRESS, MPU6050_RA_GYRO_CONFIG, 105 MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, MPU6050_GYRO_FS_250); 106 MPU6050_WriteBits(MPU6050_DEFAULT_ADDRESS, MPU6050_RA_ACCEL_CONFIG, 107 MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, MPU6050_ACCEL_FS_2); 108 MPU6050_WriteBit(MPU6050_DEFAULT_ADDRESS, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, 0);//(DISABLE); 109 } 110 111 uint8_t MPU6050_GetDeviceID() 112 { 113 uint8_t tmp; 114 MPU6050_ReadBits(MPU6050_DEFAULT_ADDRESS, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, &tmp); 115 return tmp; 116 } 117 118 uint8_t MPU6050_TestConnection() 119 { 120 // uint8_t tmp; 121 if(MPU6050_GetDeviceID() == 0x34) //0b110100; 8-bit representation in hex = 0x34 122 return 1; 123 else 124 return 0; 125 } 126 127 void MPU6050_GetRawAccelGyro(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz) 128 { 129 // u8 tmpBuffer[14]; 130 // int i; 131 MPU6050_Read(MPU6050_DEFAULT_ADDRESS, MPU6050_RA_ACCEL_XOUT_H, 14); 132 /* Get acceleration */ 133 // for(i=0; i<3; i++) 134 // AccelGyro[i]=((int16_t)((uint16_t)I2CSlaveBuffer[PORT_USED][2*i] << 8) + I2CSlaveBuffer[PORT_USED][2*i+1]); 135 /* Get Angular rate */ 136 // for(i=4; i<7; i++) 137 // AccelGyro[i-1]=((int16_t)((uint16_t)I2CSlaveBuffer[PORT_USED][2*i] << 8) + I2CSlaveBuffer[PORT_USED][2*i+1]); 138 *ax = (((int16_t)I2CSlaveBuffer[PORT_USED][0]) << 8) | ((int16_t)I2CSlaveBuffer[PORT_USED][1]); 139 *ay = (((int16_t)I2CSlaveBuffer[PORT_USED][2]) << 8) | ((int16_t)I2CSlaveBuffer[PORT_USED][3]); 140 *az = (((int16_t)I2CSlaveBuffer[PORT_USED][4]) << 8) | ((int16_t)I2CSlaveBuffer[PORT_USED][5]); 141 *gx = (((int16_t)I2CSlaveBuffer[PORT_USED][8]) << 8) | ((int16_t)I2CSlaveBuffer[PORT_USED][9]); 142 *gy = (((int16_t)I2CSlaveBuffer[PORT_USED][10]) << 8) | ((int16_t)I2CSlaveBuffer[PORT_USED][11]); 143 *gz = (((int16_t)I2CSlaveBuffer[PORT_USED][12]) << 8) | ((int16_t)I2CSlaveBuffer[PORT_USED][13]); 144 }
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