PHP
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High Power Thin Film Wraparound Chip Resistor
FEATURES
• High purity ceramic substrate
• Power rating to 2.5 W
• Resistance range 10 to 30.1 k
• Resistor tolerance to ± 0.1 %
• TCR to ± 25 ppm/°C
• Flame resistant UL 94 V-0
APPLICATIONS
PHP series chip resistors are designed with enlarged • Power supplies
backside terminations to reduce the thermal resistance • Power switching
between the topside resistor layer and the solder joint on the • Braking system
end users circuit board. • Test and measurement equipment
• Motor deflection circuits
Actual power handling capability is limited by the end user
mounting process. As with any high power chip resistor the TYPICAL PERFORMANCE
ability to remove the generated heat is critical to the overall
performance of the device. ABSOLUTE
TCR 25
TOL. 0.1
STANDARD ELECTRICAL SPECIFICATIONS
TEST SPECIFICATIONS CONDITIONS
Material Nichrome -
Resistance Range 10 to 30.1 k -
25 ppm/°C, 50 ppm/°C (standard)
TCR: Absolute -55 °C to +125 °C
and, 100 ppm/°C
Tolerance: Absolute 0.1 %, 0.5 %, 1.0 % and, 5.0 % +25 °C
Power Rating: Resistor 0.375 W - 2.5 W (1) Maximum at +70 °C
Stability: Absolute R 0.1 % 2000 h at +70 °C
Stability: Ratio Not applicable -
Voltage Coefficient < 0.1 ppm/V -
Working Voltage 75 V to 200 V -
Operating Temperature Range -55 °C to +155 °C -
Storage Temperature Range -55 °C to +155 °C -
Noise < -30 dB -
Shelf Life Stability: Absolute ± 0.01 % 1 year at +25 °C
COMPONENT RATINGS
CASE SIZE POWER RATING (mW) WORKING VOLTAGE (V) RESISTANCE RANGE ()
0603 375 (1) 75 10 to 30.1K
0805 625 (1) 100 10 to 30.1K
1206 1000 (1) 200 10 to 30.1K
2512 2500 (1) 200 10 to 30.1K
Note
(1) Dependent on component mounting by user.
ENVIRONMENTAL TESTS (Vishay Performance vs. MIL-PRF-55342 Requirements)
LIMITS MIL-PRF-55342
ENVIRONMENTAL TEST TYPICAL VISHAY PERFORMANCE
CHARACTERISTIC “E”
Resistance Temperature Characteristic ± 25 ppm/°C ± 15 ppm/°C
Maximum Ambient Temperature at Rated Wattage +70 °C +70 °C
Maximum Ambient Temperature at Power Derating +150 °C +150 °C
Thermal Shock ± 0.1 % ± 0.04 %
Low Temperature Operation ± 0.1 % ± 0.001 %
Short Time Overload ± 0.1 % ± 0.003 %
High Temperature Exposure ± 0.1 % ± 0.030 %
Resistance to Soldering Heat ± 0.2 % ± 0.007 %
Moisture Resistance ± 0.2 % ± 0.002 %
Life at +70 °C for 2000 h ± 0.5 % ± 0.100 %
Revision: 27-Jun-16 1 Document Number: 60076
For technical questions, contact: thinfilm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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DIMENSIONS in inches
D
W
T
E
L
WIDTH THICKNESS TOP PAD BOTTOM PAD
CASE SIZE LENGTH
W (± 0.005) MIN./MAX. D (± 0.005) E (± 0.005)
0603 0.064 ± 0.006 0.032 0.020 max. 0.012 0.021
0805 0.080 ± 0.006 0.050 0.015/0.033 0.016 0.025
1206 0.126 ± 0.008 0.063 0.015/0.033 0.020 + 0.005/- 0.010 0.040
2512 0.259 + 0.009/- 0.015 0.124 0.015/0.033 0.02 0.050
LAND PATTERN DIMENSIONS in inches
0603 Land Pattern 1206 Land Pattern
0.0920 0.1730
0.0340
0.0710
0.0140
0.0390
0.0220
0.0755
0805 Land Pattern 2512 Land Pattern
0.1050 0.2910
0.0520
0.1260
0.0200
0.0425
0.1090
0.0910
STANDARD MATERIAL SPECIFICATIONS
Resistive Element Nichrome
Substrate Material Alumina (Al O )
2 3
Terminations (Tin/Lead) Tin/lead solder over nickel barrier
Terminations (Lead (Pb)-free) Tin/silver/copper (Sn96.5Ag3.0Cu0.5) solder over nickel barrier
Revision: 27-Jun-16 2 Document Number: 60076
For technical questions, contact: thinfilm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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PHP CHIP TEMP. VS. APPLIED POWER PHP CHIP TEMP. VS. APPLIED POWER
5.00 5.00
4.50 0603 - 100 Ω 4.50 0805 - 100 Ω
0603 - 5 kΩ 0805 - 5 kΩ
W) 4.00 0603 - 18.8 kΩ W) 4.00 0805 - 20 kΩ
er ( 3.50 er ( 3.50
w 3.00 w 3.00
Po 2.50 Po 2.50
d 2.00 d 2.00
e e
pli 1.50 pli 1.50
Ap 1.00 Ap 1.00
0.50 0.50
0.00 0.00
70 150 200 70 150 200
Chip Surface Temperature (°C) Chip Surface Temperature (°C)
Note Note
• Chip surface temperature measured using FLIR SC645 thermal • Chip surface temperature measured using FLIR SC645 thermal
imaging system with an approximate test card surface imaging system with an approximate test card surface
temperature of 85 °C. temperature of 85 °C.
PHP CHIP TEMP. VS. APPLIED POWER PHP CHIP TEMP. VS. APPLIED POWER
5.00 10.00
4.50 1206 - 100 Ω 9.00 2512 - 10 Ω
1206 - 5 kΩ 2512 - 10 kΩ
W) 4.00 1206 - 10 kΩ W) 8.00 2512 - 30 kΩ
er ( 3.50 er ( 7.00
w 3.00 w 6.00
Po 2.50 Po 5.00
d 2.00 d 4.00
e e
pli 1.50 pli 3.00
Ap 1.00 Ap 2.00
0.50 1.00
0.00 0.00
70 150 200 70 150 200
Chip Surface Temperature (°C) Chip Surface Temperature (°C)
Notes
Notes
• Chip surface temperature measured using FLIR A40 thermal
imaging system with an approximate test card surface • Chip surface temperature measured using FLIR A40 thermal
temperature of 25 °C. imaging system with an approximate test card surface
temperature of 25 °C.
• Thermal imaging was conducted under ambient conditions
resulting in a steady state test card surface temperature of 85 °C Case Size 2512 2512 2512
over the full range of power levels.
Resistance
• Thermal imaging and load life testing was conducted mounting Value Up to 10 Up to 10 k Up to 30 k
one device to 2" x 3" test cards with 2.5 mil copper plating on
Temperature Power (W)
both surfaces. Thermal vias on 120 mil centers were utilized for
heat transfer between surfaces of the test card. 70 2.44 1.81 1.87
150 6.82 4.89 5.19
200 9.33 6.63 7.09
Revision: 27-Jun-16 3 Document Number: 60076
For technical questions, contact: thinfilm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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SINGLE PULSE CURVES
1000
100 Ω - 2512
100 Ω - 1206
W)100
er (
w
o 10
P
e
s
Pul 1 100 Ω - 0805
100 Ω - 0603
0.1
0.00001 0.0001 0.001 0.01 0.1 1 10
Pulse Duration (s)
DERATING CURVE
100
wer 80
o
P
ed 60
at
R
of 40
nt
e
c
er 20
P
0
0 70 125 155
Ambient Temperature °C
GLOBAL PART NUMBER INFORMATION
P H P 0 1 2 0 6 E 1 0 0 2 B B T 1
GLOBAL CASE
SUBSTRATE TCR RESISTANCE TOLERANCE TERMINATION PACKAGING
MODEL SIZE
PHP 0 = Alumina 0603 E = The first 3 digits B = ± 0.1 % B =Wraparound BS = BULK
0805 ± 25 ppm/°C are significant D = ± 0.5 % Sn/Pb solder 100 min., 1 mult
1206 H = figures and the F = ± 1.0 % w/nickel barrier WS = WAFFLE
2512 ± 50 ppm/°C last digit G = ± 2.0 % 100 min., 1 mult
K = specifies the J = ± 5.0 % S = Wraparound WI = WAFFLE
± 100 ppm/°C number of lead (Pb)-free solder (item single lot
zeros to follow. SAC-305 day code)
“R” designates RoHS-compliant - e1 100 min., 1 mult
the decimal
point. TAPE AND REEL
T1 = 1000 min.,
Example: 1000 mult
10R0 = 10 T3 = 300 min., 300 mult
1000 = 100 T5 = 500 min., 500 mult
1001 = 1 k TF = Full reel
TS =100 min., 1 mult
TI = 100 min., 1 mult
(item single lot
date code)
TP =100 min., 1 mult
(package unit
single lot date)
Revision: 27-Jun-16 4 Document Number: 60076
For technical questions, contact: thinfilm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 08-Feb-17 1 Document Number: 91000