php不调用父类构造_PHP: 构造函数和析构函数 - Manual

When a script is in the process of die()ing, you can't count on the order in which __destruct() will be called.

For a script I have been working on, I wanted to do transparent low-level encryption of any outgoing data.  To accomplish this, I used a global singleton class configured like this:

class EncryptedComms

{

private $C;

private $objs = array();

private static $_me;

public static function destroyAfter(&$obj)

{

self::getInstance()->objs[] =& $obj;

/*

Hopefully by forcing a reference to another object to exist

inside this class, the referenced object will need to be destroyed

before garbage collection can occur on this object.  This will force

this object's destruct method to be fired AFTER the destructors of

all the objects referenced here.

*/

}

public function __construct($key)

{

$this->C = new SimpleCrypt($key);

ob_start(array($this,'getBuffer'));

}

public static function &getInstance($key=NULL)

{

if(!self::$_me && $key)

self::$_me = new EncryptedComms($key);

else

return self::$_me;

}

public function __destruct()

{

ob_end_flush();

}

public function getBuffer($str)

{

return $this->C->encrypt($str);

}

}

In this example, I tried to register other objects to always be destroyed just before this object.  Like this:

class A

{

public function __construct()

{

EncryptedComms::destroyAfter($this);

}

}

One would think that the references to the objects contained in the singleton would be destroyed first, but this is not the case.  In fact, this won't work even if you reverse the paradigm and store a reference to EncryptedComms in every object you'd like to be destroyed before it.

In short, when a script die()s, there doesn't seem to be any way to predict the order in which the destructors will fire.

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class vbase_test extends uvm_test; `uvm_component_utils(vbase_test) env m_env; vseqr m_vseqr; int unsigned simSeed; function new(string name, uvm_component parent); super.new(name, parent); endfunction : new extern function void build_phase (uvm_phase phase); extern function void connect_phase (uvm_phase phase); extern task reset_phase(uvm_phase phase); extern task reset_reg_model(); extern function void end_of_elaboration_phase(uvm_phase phase); extern function void start_of_simulation_phase(uvm_phase phase); extern task main_phase(uvm_phase phase); // report test result extern virtual function void report_phase(uvm_phase phase); endclass : vbase_test function void vbase_test::build_phase (uvm_phase phase); super.build_phase(phase); m_env = env::type_id::create(.name("m_env"), .parent(this)); // virtual sequencer m_vseqr = vseqr::type_id::create(.name("m_vseqr"), .parent(this)); uvm_config_db# (uvm_object_wrapper)::set(this,"m_vseqr.main_phase","default_sequence",vBaseSeq::type_id::get()); //uvm_config_db# (uvm_object_wrapper)::set(this,"m_vseqr.main_phase","default_sequence",vUniBaseSeq#()::type_id::get()); endfunction : build_phase function void vbase_test::connect_phase (uvm_phase phase); m_vseqr.p_rm = m_env.m_reg_model; m_vseqr.i2c_seqr = m_env.m_i2c_agent.m_seqr; endfunction : connect_phase task vbase_test::reset_phase(uvm_phase phase); //`uvm_info(get_type_name(), {"REGISTER MODEL:\n", m_reg_model.sprint()}, UVM_MEDIUM) reset_reg_model(); super.reset_phase(phase); endtask task vbase_test::reset_reg_model(); forever begin wait (tb_top.reset_n == 0); m_env.m_reg_model.reset(); `uvm_info(get_type_name(), "Reseting Complete", UVM_MEDIUM) wait (tb_top.reset_n == 1); end endtask function void vbase_test::end_of_elaboration_phase(uvm_phase phase); int handle; $system("rm -rf TEST_RUNNING"); simSeed = $get_initial_random_seed(); handle = $fopen($psprintf("TEST_RUNNING_%0d",simSeed),"w"); $fclose(handle); handle = $fopen("caseSeed","w"); $fwrite(handle,"%0d",simSeed); $fclose(handle); if($test$plusargs("uvm_tree")) uvm_top.print_topology(); endfunction : end_of_elaboration_phase function void vbase_test::start_of_simulation_phase(uvm_phase phase); `uvm_info(get_type_name(), {"start of simulation for ", get_full_name()}, UVM_HIGH); endfunction : start_of_simulation_phase task vbase_test::main_phase(uvm_phase phase); phase.phase_done.set_drain_time(this, 200ns); endtask : main_phase // report test result function void vbase_test::report_phase(uvm_phase phase); uvm_report_server server; int handle; int unsigned err_num; super.report_phase(phase); server = get_report_server(); err_num = (server.get_severity_count(UVM_ERROR) + server.get_severity_count(UVM_FATAL)); simSeed = $get_initial_random_seed(); $display("\n********************************************************************************************\n"); if (err_num != 0) begin $display("TEST CASE FAILED!!!"); handle = $fopen($psprintf("TEST_FAILED_%0d",simSeed),"w"); end else begin $display("TEST CASE PASSED!!!"); handle = $fopen($psprintf("TEST_PASSED_%0d",simSeed),"w"); end $fclose(handle); $display("\n********************************************************************************************\n"); $system("rm -rf TEST_RUNNING*"); endfunction `endif
最新发布
07-25

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