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TL05x, TL05xA

ENHANCED-JFET LOW-OFFSET

OPERATIONAL AMPLIFIERS

SLOS178A – FEBRUARY 1997 - REVISED FEBRUARY 2003

D

D

Direct Upgrades to TL07x and TL08x BiFET

Operational Amplifiers

Faster Slew Rate (20 V/µs Typ) Without

Increased Power Consumption

TL051

D OR P PACKAGE

(TOP VIEW)

D

On-Chip Offset-Voltage Trimming for

Improved DC Performance and Precision

Grades Are Available (1.5 mV, TL051A)

TL052

D, P, OR PS PACKAGE

(TOP VIEW)

TL054

D, DB, N, OR NS PACKAGE

(TOP VIEW)

OFFSET N1

IN–

IN+

V

CC–

1

2

3

4

8

7

6

5

NC

V

CC+

OUT

OFFSET N2

1OUT

1IN–

1IN+

V

CC–

1

2

3

4

8

7

6

5

V

CC+

2OUT

2IN–

2IN+

1OUT

1IN–

1IN+

V

CC+

2IN+

2IN–

2OUT

1

2

3

4

5

6

7

14

13

12

11

10

9

8

4OUT

4IN–

4IN+

V

CC–

3IN+

3IN–

3OUT

description/ordering information

The TL05x series of JFET-input operational amplifiers offers improved dc and ac characteristics over the TL07x

and TL08x families of BiFET operational amplifiers. On-chip Zener trimming of offset voltage yields precision

grades as low as 1.5 mV (TL051A) for greater accuracy in dc-coupled applications. Texas Instruments improved

BiFET process and optimized designs also yield improved bandwidth and slew rate without increased power

consumption. The TL05x devices are pin-compatible with the TL07x and TL08x and can be used to upgrade

existing circuits or for optimal performance in new designs.

BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transistors, without

sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with

high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than

bipolar or CMOS devices having comparable power consumption.

The TL05x family was designed to offer higher precision and better ac response than the TL08x, with the low

noise floor of the TL07x. Designers requiring significantly faster ac response or ensured lower noise should

consider the Excalibur TLE208x and TLE207x families of BiFET operational amplifiers.

Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to

observe common-mode input voltage limits and output swing when operating from a single supply. DC biasing

of the input signal is required, and loads should be terminated to a virtual-ground node at mid-supply. Texas

Instruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from single

supplies.

The TL05x are fully specified at

±15

V and

±5

V. For operation in low-voltage and/or single-supply systems,

Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When moving

from BiFET to CMOS amplifiers, particular attention should be paid to the slew rate and bandwidth

requirements, and also the output loading.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright

2003, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

1

a833a1e92f076b13e0d5c5e5eba58af2.png

TL05x, TL05xA

ENHANCED-JFET LOW-OFFSET

OPERATIONAL AMPLIFIERS

SLOS178A – FEBRUARY 1997 - REVISED FEBRUARY 2003

ORDERING INFORMATION

TA

VIOmax

AT 25°C

PDIP (P)

800

µV

SOIC (D)

PACKAGE†

Tube of 50

Tube of 75

Tube of 75

Reel of 2500

PDIP (P)

PDIP (N)

Tube of 50

Tube of 25

Tube of 75

0°C to 70°C

Reel of 2500

1.5 mV

SOIC (D)

Tube of 75

Reel of 2500

Tube of 50

Reel of 2500

SOP (PS)

SSOP (DB)

PDIP (N)

4 mV

SOIC (D)

SOP (NS)

PDIP (P)

800

µV

SOIC (D)

PDIP (N)

PDIP (P)

–40°C to 85°C

40°C

1.5

1 5 mV

SOIC (D)

Reel of 2000

Reel of 2000

Tube of 25

Tube of 50

Reel of 2500

Reel of 2000

Tube of 50

Tube of 75

Reel of 2500

Tube of 25

Tube of 50

Tube of 75

Tube of 75

Reel of 2500

Tube of 50

Reel of 2500

PDIP (N)

4 mV

SOIC (D)

Tube of 25

Tube of 50

Reel of 2500

ORDERABLE

PART NUMBER

TL051ACP

TL052ACP

TL051ACD

TL052ACD

TL052ACDR

TL051CP

TL052CP

TL054ACN

TL051CD

TL051CDR

TL052CD

TL052CDR

TL054ACD

TL054ACDR

TL052CPSR

TL054CDBR

TL054CN

TL054CD

TL054CDR

TL054CNSR

TL052AIP

TL052AID

TL052AIDR

TL054AIN

TL051IP

TL052IP

TL051ID

TL052ID

TL052IDR

TL054AID

TL054AIDR

TL054IN

TL054ID

TL054IDR

TOP-SIDE

MARKING

TL051ACP

TL052ACP

051AC

052AC

TL051CP

TL052CP

TL054ACN

TL051C

TL052C

TL054C

TL052

TL054

TL054CN

TL054C

TL054

TL052AI

052AI

TL054AIN

TL051IP

TL052IP

TL051I

TL052I

TL054AI

TL054IN

TL054I

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

2

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

084246b6cdb1c9495f9baa59fc1dcd53.png

TL05x, TL05xA

ENHANCED-JFET LOW-OFFSET

OPERATIONAL AMPLIFIERS

SLOS178A – FEBRUARY 1997 - REVISED FEBRUARY 2003

symbol (each amplifier)

OUT

IN+

+

VCC+

Q10

Q2

Q3

Q6

Q11

IN+

D1

IN–

JF1

Q4

Q1

See Note A

OFFSET N1

OFFSET N2

R1

R2

R3

Q5

R4

R6

Q8

Q9

R10

D2

JF2

C1

Q14

Q17

R5

R8

Q12

Q13

R7

R9

OUT

Q7

Q16

Q15

JF3

VCC–

NOTE A: OFFSET N1 and OFFSET N2 are available only on the TL051x.

ACTUAL DEVICE COMPONENT COUNT†

COMPONENT

Transistors

Resistors

Diodes

Capacitors

TL051

20

10

2

1

TL052

34

19

3

2

TL054

62

37

5

4

IN–

equivalent schematic (each amplifier)

† These figures include all four amplifiers and all ESD, bias, and trim circuitry.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

3

1f104c2bf019edca9a6ee237ea2d014c.png

TL05x, TL05xA

ENHANCED-JFET LOW-OFFSET

OPERATIONAL AMPLIFIERS

SLOS178A – FEBRUARY 1997 - REVISED FEBRUARY 2003

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

CC+

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V

Supply voltage, V

CC–

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V

Differential input voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±30

V

Input voltage range, V

I

(any input, see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±15

V

Input current, I

I

(each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±1

mA

Output current, I

O

(each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±80

mA

Total current into V

CC+

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA

Total current out of V

CC–

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA

Duration of short-circuit current at (or below) 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited

Package thermal impedance,

θ

JA

(see Notes 4 and 5): D package (8 pin) . . . . . . . . . . . . . . . . . . . . . . 97°C/W

D package (14 pin) . . . . . . . . . . . . . . . . . . . . . 86°C/W

DB package (14 pin) . . . . . . . . . . . . . . . . . . . 96°C/W

N package (14 pin) . . . . . . . . . . . . . . . . . . . . . 80°C/W

NS package (14 pin) . . . . . . . . . . . . . . . . . . . 76°C/W

P package (8 pin) . . . . . . . . . . . . . . . . . . . . . . 85°C/W

PS package (8 pin) . . . . . . . . . . . . . . . . . . . . 95°C/W

Operating virtual junction temperature, T

J

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Lead temperature 1,6 mm (1/16inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–.

2. Differential voltages are at IN+ with respect to IN–.

3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.

4. Maximum power dissipation is a function of TJ(max),

θ

JA, and TA. The maximum allowable power dissipation at any allowable

ambient temperature is PD = (TJ(max) – TA)/

θ

JA. Operating at the absolute maximum TJ of 150°C can impact reliability.

5. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions

C SUFFIX

MIN

VCC±

VIC

TA

Supply voltage

Common mode input voltage

Common-mode

Operating free-air temperature

VCC± =

±5

V

VCC± =

±15

V

±5

–1

–11

0

MAX

±15

4

11

70

I SUFFIX

MIN

±5

–1

–11

–40

MAX

±15

4

11

85

UNIT

V

V

°C

4

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

c6650889593d1520237acf826a50c97b.png

TL05x, TL05xA

ENHANCED-JFET LOW-OFFSET

OPERATIONAL AMPLIFIERS

SLOS178A – FEBRUARY 1997 - REVISED FEBRUARY 2003

TL051C and TL051AC electrical characteristics at specified free-air temperature

TL051C, TL051AC

PARAMETER

TEST CONDITIONS

TA†

25°C

Full range

25°C

Full range

25°C to

70°C

25°C to

70°C

25°C

VO = 0,

VIC = 0,

See Figure 5

VO = 0,

VIC = 0,

See Figure 5

25°C

70°C

25°C

70°C

25°C

VICR

Common-mode input

voltage range

Full range

25°C

Full range

25°C

Full range

25°C

Full range

25°C

Full range

25°C

AVD

ri

ci

CMRR

Large-signal differential

L

i

l diff

ti l

amplification

voltage am lification

Input resistance

Input capacitance

Common-mode

Common mode

rejection ratio

VIC = VICRmin,

min

0,

VO = 0

RS = 50

RL = 2 kΩ

0°C

70°C

25°C

25°C

25°C

0°C

70°C

25°C

kSVR

Supply voltage rejection

Supply-voltage

ratio (∆VCC±/∆VIO)

VO = 0,

RS = 50

0°C

70°C

25°C

ICC

Supply current

y

VO = 0,

No load

0°C

70°C

65

65

65

75

75

75

–1

to

4

–1

to

4

3

3

2.5

2.5

–2.5

–2.5

–2.3

–2.3

25

30

20

59

65

46

1012

10

85

84

84

99

98

97

2.6

2.7

2.6

3.2

3.2

3.2

75

75

75

75

75

75

–3.2

–3.5

3.8

4.2

8

8

0.04

4

0.02

20

0.15

–2.3

to

5.6

100

1

200

4

–11

to

11

–11

to

11

13

13

11.5

11.5

–12

–12

–11

–11

50

60

30

105

129

85

1012

12

93

92

91

99

98

97

2.7

2.8

2.7

3.2

3.2

3.2

mA

dB

dB

V/mV

pF

–12

–13.2

V

12.7

13.9

V

0.55

VCC± =

±5

V

MIN

TYP

MAX

0.75

3.5

4.5

2.8

3.8

8

µV/°C

8

0.04

5

0.025

30

0.2

–12.3

to

15.6

100

1

200

4

25

µV/mo

pA

nA

pA

nA

0.35

VCC± =

±15

V

MIN

TYP

MAX

0.59

1.5

2.5

0.8

1.8

mV

UNIT

TL051C

VIO

Input offset voltage

TL051AC

VO = 0

0,

VIC = 0,

RS = 50

TL051C

TL051AC

a

V

IO

Temperature coefficient

of input offset voltage‡

Input offset-voltage

long-term drift§

IIO

IIB

Input offset current

Input bias current

V

VOM

OM+

Maximum positive peak

output voltage swing

RL = 10 kΩ

RL = 2 kΩ

RL = 10 kΩ

RL = 2 kΩ

VOM

OM–

Maximum negative peak

g

output voltage swing

† Full range is 0°C to 70°C.

‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing

on testing or nontesting of other parameters.

§ Typical values are based on the input offset-voltage shift observed through 168 hours of operating life test at TA = 150°C, extrapolated to

TA = 25°C using the Arrhenius equation, and assuming an activation energy of 0.96 eV.

¶ For VCC± =

±5

V, VO =

±2.3

V, or for VCC± =

±15

V, VO =

±10

V.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

5

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