<?xml version="1.0" encoding="utf-8" ?><rss version="2.0"><channel><title><![CDATA[weixin_43249158的博客]]></title><description><![CDATA[]]></description><link>https://blog.csdn.net/weixin_43249158</link><language>zh-cn</language><generator>https://blog.csdn.net/</generator><copyright><![CDATA[Copyright &copy; weixin_43249158]]></copyright><item><title><![CDATA[微处理器重要技术之——存储器架构]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125346439</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125346439</guid><author>weixin_43249158</author><pubDate>Mon, 04 Jul 2022 16:56:07 +0800</pubDate><description><![CDATA[介绍处理器缓存基础知识]]></description><category></category></item><item><title><![CDATA[微处理器重要技术之——片上总线（AXI）]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125555794</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125555794</guid><author>weixin_43249158</author><pubDate>Mon, 04 Jul 2022 16:37:42 +0800</pubDate><description><![CDATA[AMBA 协议介绍的续篇，AXI 协议的介绍]]></description><category></category></item><item><title><![CDATA[微处理器重要技术之——片上总线（AMBA为例）]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125362918</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125362918</guid><author>weixin_43249158</author><pubDate>Fri, 01 Jul 2022 11:41:38 +0800</pubDate><description><![CDATA[介绍AMBA系列的AHB和APB总线]]></description><category></category></item><item><title><![CDATA[集成电路期刊会议]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125547878</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125547878</guid><author>weixin_43249158</author><pubDate>Thu, 30 Jun 2022 20:38:32 +0800</pubDate><description><![CDATA[集成电路领域的重要期刊会议]]></description><category></category></item><item><title><![CDATA[一个非常简单的CPU]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125315155</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125315155</guid><author>weixin_43249158</author><pubDate>Thu, 16 Jun 2022 15:09:00 +0800</pubDate><description><![CDATA[介绍一个简单的1位 CPU]]></description><category></category></item><item><title><![CDATA[微处理器重要技术之——流水线]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125248719</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125248719</guid><author>weixin_43249158</author><pubDate>Mon, 13 Jun 2022 20:53:47 +0800</pubDate><description><![CDATA[介绍 CPU 流水线基础知识]]></description><category></category></item><item><title><![CDATA[数字电路的明珠——CPU，也谈RISC-V]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125184048</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125184048</guid><author>weixin_43249158</author><pubDate>Fri, 10 Jun 2022 17:32:58 +0800</pubDate><description><![CDATA[介绍几种比较著名的 CPU 架构]]></description><category></category></item><item><title><![CDATA[标准单元的 Cell 种类]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125146475</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125146475</guid><author>weixin_43249158</author><pubDate>Mon, 06 Jun 2022 18:57:27 +0800</pubDate><description><![CDATA[介绍标准单元库里都有哪些单元]]></description><category></category></item><item><title><![CDATA[后端流程之布局——Floorplanning]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/125031675</link><guid>https://blog.csdn.net/weixin_43249158/article/details/125031675</guid><author>weixin_43249158</author><pubDate>Mon, 30 May 2022 11:17:02 +0800</pubDate><description><![CDATA[介绍后端设计Floorplan的基本概念及布局的原则]]></description><category></category></item><item><title><![CDATA[再谈标准单元技术]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/124978190</link><guid>https://blog.csdn.net/weixin_43249158/article/details/124978190</guid><author>weixin_43249158</author><pubDate>Fri, 27 May 2022 13:53:49 +0800</pubDate><description><![CDATA[目录标准网络网格式布线系统要求的库设计规则设计尺寸单位λ对齐输入和输出高度固定，宽度可变半网格单元尺寸布线通道
标准网络
标准版图系统把每样东西都以一个标准网格作为对准的基础，使得工具能够自动布线并保证标准单元整体布置的可操作性。一个网格式布线器的导线只能有几种固定的宽度并且只能放在预先确定了坐标的网格上。
设计规则决定了网格尺寸。假设工艺规定 Metal 1导线的最小宽度为1微米，最小间隔也是1微米，那么两条导线的中心线之间相距2微米，就确定网格间距是2微米。那么网格式布线器只能沿网格线从一个交叉点到另一]]></description><category></category></item><item><title><![CDATA[时钟树综合（CTS）]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/124837883</link><guid>https://blog.csdn.net/weixin_43249158/article/details/124837883</guid><author>weixin_43249158</author><pubDate>Thu, 19 May 2022 19:59:34 +0800</pubDate><description><![CDATA[介绍时钟树综合（CTS）的概念以及相关要求]]></description><category></category></item><item><title><![CDATA[Innovus——数据准备和验证]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/124779585</link><guid>https://blog.csdn.net/weixin_43249158/article/details/124779585</guid><author>weixin_43249158</author><pubDate>Sun, 15 May 2022 20:02:13 +0800</pubDate><description><![CDATA[介绍使用Innovus之前需要准备的数据]]></description><category></category></item><item><title><![CDATA[OCEAN 电路仿真]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/124647001</link><guid>https://blog.csdn.net/weixin_43249158/article/details/124647001</guid><author>weixin_43249158</author><pubDate>Sun, 08 May 2022 14:55:09 +0800</pubDate><description><![CDATA[介绍利用 Cadence OCEAN 进行电路脚本仿真的方法]]></description><category></category></item><item><title><![CDATA[数字电路功耗分析基础]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/124523379</link><guid>https://blog.csdn.net/weixin_43249158/article/details/124523379</guid><author>weixin_43249158</author><pubDate>Sun, 01 May 2022 11:41:35 +0800</pubDate><description><![CDATA[介绍数字电路功耗来源及建模方法。]]></description><category></category></item><item><title><![CDATA[数字电路时序分析基础]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/124512666</link><guid>https://blog.csdn.net/weixin_43249158/article/details/124512666</guid><author>weixin_43249158</author><pubDate>Sat, 30 Apr 2022 21:41:31 +0800</pubDate><description><![CDATA[介绍了数字电路单元延时以及建模，这些是时序分析的基础。]]></description><category></category></item><item><title><![CDATA[LEF文件介绍及其生成]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/124472113</link><guid>https://blog.csdn.net/weixin_43249158/article/details/124472113</guid><author>weixin_43249158</author><pubDate>Thu, 28 Apr 2022 18:12:54 +0800</pubDate><description><![CDATA[介绍LEF文件及其生成方法]]></description><category></category></item><item><title><![CDATA[DC的逻辑综合与优化]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/123888942</link><guid>https://blog.csdn.net/weixin_43249158/article/details/123888942</guid><author>weixin_43249158</author><pubDate>Fri, 01 Apr 2022 13:35:37 +0800</pubDate><description><![CDATA[介绍了DC综合过程中的优化手段]]></description><category></category></item><item><title><![CDATA[DC综合流程]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/123839876</link><guid>https://blog.csdn.net/weixin_43249158/article/details/123839876</guid><author>weixin_43249158</author><pubDate>Wed, 30 Mar 2022 15:50:28 +0800</pubDate><description><![CDATA[介绍了Synopsys Design Compiler综合流程，包括设计读入、约束设计、报告查看等。]]></description><category></category></item><item><title><![CDATA[Synopsys Design Compiler基础]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/123816821</link><guid>https://blog.csdn.net/weixin_43249158/article/details/123816821</guid><author>weixin_43249158</author><pubDate>Tue, 29 Mar 2022 13:51:55 +0800</pubDate><description><![CDATA[介绍了Synopsys的综合工具Design Compiler]]></description><category></category></item><item><title><![CDATA[NC-Verilog仿真]]></title><link>https://blog.csdn.net/weixin_43249158/article/details/123803153</link><guid>https://blog.csdn.net/weixin_43249158/article/details/123803153</guid><author>weixin_43249158</author><pubDate>Tue, 29 Mar 2022 09:13:08 +0800</pubDate><description><![CDATA[本篇以Cadence的NC Verilog为例介绍了RTL仿真的基础知识。
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