7.7 review 7.6

【leetcode】

566. reshape the matrix

y%x 代表着对x求余

y//x 代表着对x除，然后求整

【uvm 网课】

{factory 工厂机制}

1.uvm_coreservice_t/uvm_factory 独立于uvm environment之外(这个class 的意义和应用？）

2.后台利用工厂来进行创建

create_component_by_name/type()

create_object_by_type/name()

create_component/object()

{factory的override}

1.type override

orig_type::type_id::set_inst_override(new_type::get_type(), "orig_inst_path")

2.instance override

orig_type::type_id::set_type_override(new_type::get_type())

要点

1.子父都要注册

2.子类继承父类，且覆盖父类

3.覆盖发生在创建之前

4.层次越高，覆盖优先级越高

5.虚方法访问子类function

【digital logic design】

[JK触发器]

00，0->0, 1->1

11, 0->1, 1->0

01,0->0, 1->0

10,1->1, 0->1

D=JQ'+K'Q

[T触发器]

0，0->0, 1->1

1, 1->0, 0->1

D=TQ'+T'Q

[D 触发器]

D=Q

[门之间的排列组合]

[MUX，NOT，OR，NOR，NAND，AND，XOR，D flip-flop]

MUX：Y=SB+S'A

NOT：Y=A'

OR：Y=A+B

NOR：Y=（A+B）'

NAND：Y=（AB）'

AND：Y=AB

XOR：Y=AB'+A'B

[XOR]

用处1：error detecting & error checking and correcting

how？even/odd parity agreed parity protocol：we want even 0/ odd 1

用处2: pseudo random number generators

【computer architecture】

RISC 和 CISC的区别？

RISC（reduced instruction set computing）

1.less number of and simple instructions（fixed length instrcuions，and less addressing modes）

2.smaller instructions and less complex hardware

3.need more RAM

4.pipelines！better performance！

5.- numbers of cycle per instruction 

6.multiple instruction

6.1：load value from memory to an internal register 

6.2:   perform intended operation

6.3：write register results back to memory

CISC（complex instrcution set computing）

1.more number of and complex instructions（variable length instructions， and more addressing modes）

2.more complex hardware an break down complex instructions

3.need less RAM

4.- number of instructions per program

5.single instruction：memory to memory operation