module LED_IP
(
input wire csi_clk,
input wire rsi_rst,
input wire [7:0] avs_address,
input wire avs_read,
input wire avs_write,
output wire [15:0] avs_readdata,
input wire [15:0] avs_writedata,
output wire coe_led
);
//地址译码
reg [15:0] data_buffer;
always @(*)
begin
if(!rsi_rst)
data_buffer=0;
else if(avs_write && (avs_address==8'h20))
data_buffer=avs_writedata;
end
//功能实现
reg led;
always @(posedge csi_clk or negedge rsi_rst)
begin
if(!rsi_rst)
led<=0;
else if(data_buffer==16'h5a5a)
led<=1;
else if(data_buffer==16'ha5a5)
led<=0;
end
assign coe_led=led;
endmodule
LED_IP
最新推荐文章于 2023-07-14 15:38:50 发布