OK6410(256MRAM2Gnandflash) uboot2010.03移植笔记

对于arm11这个版本的uboot足够用了,想试试ubi文件系统的朋友 这个版本也是支持的,虽然还没试过,据说读写速度比yaffs2快。

下面一系列笔记很多都是参考网上的,但我争取比他们写得更详细,难免以后自己还是会遇到这些问题,好记性不如烂笔头,呵呵。

先告诉一些想移植的朋友,移植前先看看前人的笔记是很有帮助的,对一个新版本的移植,记得要看一下英文的read me文档,祝你们移植成功。

 

移植中主要修改和创建的文件。

1.  在board/samsung下建立文件夹,把smdk6400 文件夹里面的东西复制到 smdk6410 文件夹中,把所有6400的字眼全部改成6410,

2.进入include/asm-arm/arch-s3c64xx/,同理复制s3c6400.h的文件内容,并改6400为6410

3.进入根目录下的makefile,同理把6400换成6410

4.现在到很重要的地方了 吼吼,启动代码 start.s,泪牛满面,关于这个代码的详细分析看这个帖子,真得很详细 点击打开链接

下面贴上代码修改后的start.S

/*
 *  armboot - Startup Code for S3C6400/ARM1176 CPU-core
 *
 * Copyright (c) 2007 Samsung Electronics
 *
 * Copyright (C) 2008
 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
 * 2007-09-21 - Added MoviNAND and OneNAND boot codes by
 * jsgood (jsgood.yang@samsung.com)
 * Base codes by scsuh (sc.suh)
 */


#include <config.h>
#include <version.h>
#ifdef CONFIG_ENABLE_MMU
#include <asm/proc/domain.h>
#endif
#include <asm/arch/s3c6400.h>


#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
#endif


/*
 *************************************************************************
 *
 * Jump vector table as in table 3.1 in [1]
 *
 *************************************************************************
 */


.globl _start
_start: b reset
#ifndef CONFIG_NAND_SPL
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq


_undefined_instruction:
.word undefined_instruction
_software_interrupt:
.word software_interrupt
_prefetch_abort:
.word prefetch_abort
_data_abort:
.word data_abort
_not_used:
.word not_used
_irq:
.word irq
_fiq:
.word fiq
_pad:
.word 0x12345678 /* now 16*4=64 */
#else
. = _start + 64
#endif


.global _end_vect
_end_vect:
.balignl 16,0xdeadbeef
/*
 *************************************************************************
 *
 * Startup Code (reset vector)
 *
 * do important init only if we don't start from memory!
 * setup Memory and board specific bits prior to relocation.
 * relocate armboot to ram
 * setup stack
 *
 *************************************************************************
 */


_TEXT_BASE:
.word TEXT_BASE


/*
 * Below variable is very important because we use MMU in U-Boot.
 * Without it, we cannot run code correctly before MMU is ON.
 * by scsuh.
 */
_TEXT_PHY_BASE:
.word CONFIG_SYS_PHY_UBOOT_BASE


.globl _armboot_start
_armboot_start:
.word _start


/*
 * These are defined in the board-specific linker script.
 */
.globl _bss_start
_bss_start:
.word __bss_start


.globl _bss_end
_bss_end:
.word _end


/*
 * the actual reset code
 */


reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0, cpsr
//bic r0, r0, #0x3f
bic r0, r0, #0x3f
orr r0, r0, #0xd3
msr cpsr, r0


/*
 *************************************************************************
 *
 * CPU_init_critical registers
 *
 * setup important registers
 * setup memory timing
 *
 *************************************************************************
 */
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
cpu_init_crit:
/*
* When booting from NAND - it has definitely been a reset, so, no need
* to flush caches and disable the MMU
*/
#ifndef CONFIG_NAND_SPL
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */


/*
* disable MMU stuff and caches//
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
/* Prepare to disable the MMU */
//adr r1, mmu_disable_phys
/* We presume we're within the first 1024 bytes */
//and r1, r1, #0x3fc
//ldr r2, _TEXT_PHY_BASE
//ldr r3, =0xfff00000
//and r2, r2, r3
//orr r2, r2, r1
//b mmu_disable


//.align 5
/* Run in a single cache-line */
//mmu_disable:
// mcr p15, 0, r0, c1, c0, 0
// nop
// nop
// mov pc, r2
//
#endif


mmu_disable_phys:
/* Peri port setup */
ldr r0, =0x70000000
orr r0, r0, #0x13
mcr p15,0,r0,c15,c2,4       @ 256M (0x70000000 - 0x7fffffff)


/*
* Go setup Memory and board specific bits prior to relocation.
*/
bl lowlevel_init /* go setup pll,mux,memory */
/* when we already run in ram, we don't need to relocate U-Boot.
* and actually, memory controller must be configured before U-Boot
* is running in ram.
*/
ldr r0, =0xff000fff
bic r1, pc, r0  /* r0 <- current base addr of code */
ldr r2, _TEXT_BASE  /* r1 <- original base addr in ram */
bic r2, r2, r0  /* r0 <- current base addr of code */
cmp     r1, r2                  /* compare r0, r1                  */
beq     after_copy  /* r0 == r1 then skip flash copy   */


#ifdef CONFIG_BOOT_NAND
  mov r0, #0x1000
bl copy_from_nand
#endif 
after_copy:/
#ifdef CONFIG_ENABLE_MMU
enable_mmu:
/* enable domain access */
ldr r5, =0x0000ffff
mcr p15, 0, r5, c3, c0, 0 /* load domain access register */


/* Set the TTB register */
ldr r0, _mmu_table_base
ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
ldr r2, =0xfff00000
bic r0, r0, r2
orr r1, r0, r1
mcr p15, 0, r1, c2, c0, 0


/* Enable the MMU */
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #1 /* Set CR_M to enable MMU */


/* Prepare to enable the MMU */
adr r1, skip_hw_init
and r1, r1, #0x3fc
ldr r2, _TEXT_BASE
ldr r3, =0xfff00000
and r2, r2, r3
orr r2, r2, r1
b mmu_enable


.align 5
/* Run in a single cache-line */
mmu_enable:


mcr p15, 0, r0, c1, c0, 0
nop
nop
mov pc, r2
#endif


skip_hw_init:
/* Set up the stack    */
stack_setup:
ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM    */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area                      */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo                        */
sub sp, r0, #12 /* leave 3 words for abort-stack    */


clear_bss:
ldr r0, _bss_start /* find start of bss segment        */
ldr r1, _bss_end /* stop here                        */
mov r2, #0 /* clear                            */


clbss_l:
str r2, [r0] /* clear loop...                    */
add r0, r0, #4
cmp r0, r1
ble clbss_l


#ifndef CONFIG_NAND_SPL
ldr pc, _start_armboot


_start_armboot:
.word start_armboot
#else
b nand_boot
/* .word nand_boot*/
#endif


#ifdef CONFIG_ENABLE_MMU
_mmu_table_base:
.word mmu_table
#endif
/*
 * copy U-Boot to SDRAM and jump to ram (from NAND or OneNAND)
 * r0: size to be compared
 * Load 1'st 2blocks to RAM because U-boot's size is larger than 1block(128k) size
 *///
.globl copy_from_nand


copy_from_nand:
mov r10, lr  /* save return address */


  mov r9, r0
 /* get ready to call C functions */
  ldr sp, _TEXT_PHY_BASE /* setup temp stack pointer */
sub sp, sp, #12
mov fp, #0   /* no previous frame, so fp=0 */
mov r9, #0x1000
bl copy_uboot_to_ram           

3: tst  r0, #0x0
  bne copy_failed


  ldr r0, =0x0c000000
  ldr r1, _TEXT_PHY_BASE
1: ldr r3, [r0], #4
  ldr r4, [r1], #4
teq r3, r4
bne compare_failed /* not matched */
subs r9, r9, #4
bne 1b


4: mov lr, r10  /* all is OK */
  mov pc, lr


copy_failed:
  nop   /* copy from nand failed */
  b copy_failed


compare_failed:
nop   /* compare failed */
b compare_failed 
#ifndef CONFIG_NAND_SPL
/*
 * we assume that cache operation is done before. (eg. cleanup_before_linux())
 * actually, we don't need to do anything about cache if not use d-cache in
 * U-Boot. So, in this function we clean only MMU. by scsuh
 *
 * void theLastJump(void *kernel, int arch_num, uint boot_params);
 */








#ifdef CONFIG_ENABLE_MMU
.globl theLastJump
theLastJump:
mov r9, r0
ldr r3, =0xfff00000
ldr r4, _TEXT_PHY_BASE
adr r5, phy_last_jump
bic r5, r5, r3
orr r5, r5, r4
mov pc, r5
phy_last_jump:
/*
* disable MMU stuff
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
mcr p15, 0, r0, c1, c0, 0


mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */


mov r0, #0
mov pc, r9
#endif
/*
 *************************************************************************
 *
 * Interrupt handling
 *
 *************************************************************************
 */
@
@ IRQ stack frame.
@
#define S_FRAME_SIZE 72


#define S_OLD_R0 68
#define S_PSR 64
#define S_PC 60
#define S_LR 56
#define S_SP 52


#define S_IP 48
#define S_FP 44
#define S_R10 40
#define S_R9 36
#define S_R8 32
#define S_R7 28
#define S_R6 24
#define S_R5 20
#define S_R4 16
#define S_R3 12
#define S_R2 8
#define S_R1 4
#define S_R0 0


#define MODE_SVC 0x13
#define I_BIT 0x80


/*
 * use bad_save_user_regs for abort/prefetch/undef/swi ...
 */


.macro bad_save_user_regs
/* carve out a frame on current user stack */
sub sp, sp, #S_FRAME_SIZE
/* Save user registers (now in svc mode) r0-r12 */
stmia sp, {r0 - r12}


ldr r2, _armboot_start
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
/* set base 2 words into abort stack */
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)
/* get values for "aborted" pc and cpsr (into parm regs) */
ldmia r2, {r2 - r3}
/* grab pointer to old stack */
add r0, sp, #S_FRAME_SIZE


add r5, sp, #S_SP
mov r1, lr
/* save sp_SVC, lr_SVC, pc, cpsr */
stmia r5, {r0 - r3}
/* save current stack into r0 (param register) */
mov r0, sp
.endm


.macro get_bad_stack
/* setup our mode stack (enter in banked mode) */
ldr r13, _armboot_start
/* move past malloc pool */
sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
/* move to reserved a couple spots for abort stack */
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE + 8)


/* save caller lr in position 0 of saved stack */
str lr, [r13]
/* get the spsr */
mrs lr, spsr
/* save spsr in position 1 of saved stack */
str lr, [r13, #4]


/* prepare SVC-Mode */
mov r13, #MODE_SVC
@ msr spsr_c, r13
/* switch modes, make sure moves will execute */
msr spsr, r13
/* capture return pc */
mov lr, pc
/* jump to next instruction & switch modes. */
movs pc, lr
.endm


.macro get_bad_stack_swi
/* space on current stack for scratch reg. */
sub r13, r13, #4
/* save R0's value. */
str r0, [r13]
/* get data regions start */
ldr r0, _armboot_start
/* move past malloc pool */
sub r0, r0, #(CONFIG_SYS_MALLOC_LEN)
/* move past gbl and a couple spots for abort stack */
sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE + 8)
/* save caller lr in position 0 of saved stack */
str lr, [r0]
/* get the spsr */
mrs r0, spsr
/* save spsr in position 1 of saved stack */
str lr, [r0, #4]
/* restore r0 */
ldr r0, [r13]
/* pop stack entry */
add r13, r13, #4
.endm


/*
 * exception handlers
 */
.align 5
undefined_instruction:
get_bad_stack
bad_save_user_regs
bl do_undefined_instruction


.align 5
software_interrupt:
get_bad_stack_swi
bad_save_user_regs
bl do_software_interrupt


.align 5
prefetch_abort:
get_bad_stack
bad_save_user_regs
bl do_prefetch_abort


.align 5
data_abort:
get_bad_stack
bad_save_user_regs
bl do_data_abort


.align 5
not_used:
get_bad_stack
bad_save_user_regs
bl do_not_used


.align 5
irq:
get_bad_stack
bad_save_user_regs
bl do_irq


.align 5
fiq:
get_bad_stack
bad_save_user_regs
bl do_fiq
#endif /* CONFIG_NAND_SPL */

5.在cpu/arm176下,新建文件nand_cp.c

#include <common.h>  

#ifdef CONFIG_S3C64XX  

#include <asm/io.h>  

#include <linux/mtd/nand.h>  

#include <asm/arch/s3c6410.h>  

  

static int nandll_read_page (uchar *buf, ulong addr, int large_block)  

{  

     int i;

  int page_size = 512;



  if (large_block==1)

     page_size = 2048;

  if (large_block==2)

    page_size = 4096;



        NAND_ENABLE_CE();



        NFCMD_REG = NAND_CMD_READ0;



        /* Write Address */

        NFADDR_REG = 0;



  if (large_block)

          NFADDR_REG = 0;



  NFADDR_REG = (addr) & 0xff;

  NFADDR_REG = (addr >> 8) & 0xff;

  NFADDR_REG = (addr >> 16) & 0xff;



  if (large_block)

    NFCMD_REG = NAND_CMD_READSTART;



        NF_TRANSRnB();



  /* for compatibility(2460). u32 cannot be used. by scsuh */

  for(i=0; i < page_size; i++)

  {

                *buf++ = NFDATA8_REG;

         }



        NAND_DISABLE_CE();

        return 0;

}  

  

static int nandll_read_blocks (ulong dst_addr, ulong size, int large_block)  

{  

     uchar *buf = (uchar *)dst_addr;

        int i;

  uint page_shift = 9;



  if (large_block==1)

    page_shift = 11;



        /* Read pages */

  if(large_block==2)

    page_shift = 12;

 

  if(large_block == 2)

  {

   /* Read pages */

    for (i = 0; i < 4; i++, buf+=(1<<(page_shift-1)))

  {

           nandll_read_page(buf, i, large_block);

    }



 



  /* Read pages */

    for (i = 4; i < (0x3c000>>page_shift); i++, buf+=(1<<page_shift))

   {

    nandll_read_page(buf, i, large_block);

    }

  }

  else

  {

    for (i = 0; i < (0x3c000>>page_shift); i++, buf+=(1<<page_shift))

   {

            nandll_read_page(buf, i, large_block);

    }

  }



        return 0;

}  

 

 

int copy_uboot_to_ram(void)  

{  

     int large_block = 0;

  int i;

  vu_char id;

 

        NAND_ENABLE_CE();

        NFCMD_REG = NAND_CMD_READID;

        NFADDR_REG =  0x00;



  /* wait for a while */

        for (i=0; i<200; i++);

   id = NFDATA8_REG;

   id = NFDATA8_REG;



  if (id > 0x80)

    large_block = 1;

  if(id == 0xd5)

    large_block = 2;





 /* read NAND Block.

  * 128KB ->240KB because of U-Boot size increase. by scsuh

  * So, read 0x3c000 bytes not 0x20000(128KB).

  */

  return nandll_read_blocks(CONFIG_SYS_PHY_UBOOT_BASE, 0x3c000, large_block);

}  

  

#endif   

6.在cpu/arm1176中,修改makefile:

COBJS
= cpu.o nand_cp.o
7.接着进入另一个比较重要的修改地方了,修改include/configs下的smdk6410.h

在#ifndef __CONFIG_H
#define __CONFIG_H 之后添加

#define virt_to_phys(x) virt_to_phy_smdk6410(x)

#define NAND_DISABLE_CE() (NFCONT_REG |= (1 << 1))
#define NAND_ENABLE_CE() (NFCONT_REG &= ~(1 << 1))
#define NF_TRANSRnB()  do { while(!(NFSTAT_REG & (1 << 0))); } while(0)

/*
 * Architecture magic and machine type
 */
//#define MACH_TYPE  1270
#define MACH_TYPE  1626  //这里是定义6410的ID与LINUX内核是相配合的

修改内存值

/*
 * Size of malloc() pool
 */
//#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + 1024 * 1024)
#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + 512 * 1024)

延迟时间

#define CONFIG_BOOTDELAY 10 

修改SDRAM

//#define CONFIG_SYS_MEMTEST_END  (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
#define CONFIG_SYS_MEMTEST_END  (CONFIG_SYS_SDRAM_BASE + 0x9e00000) /* 126MB in DRAM */ 

修改系统时间

//#define CONFIG_SYS_HZ   1000
#define CONFIG_SYS_HZ   1562500

修改堆栈

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
//#define CONFIG_STACKSIZE 0x40000  /* regular stack 256KB */
#define CONFIG_STACKSIZE 0x80000  /* regular stack 512KB */ 

修改NANDFLASH

//#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB in Bank #1 */ 

  Size of Environment Sector 修改

//#define CONFIG_ENV_SIZE  0x4000 /* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE  0x80000 /* Total Size of Environment Sector */

bootcommand修改

#define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;" \
    "bootm 0xc0018000"
#else
#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE
//#define CONFIG_BOOTCOMMAND "nand read 0x50018000 0x60000 0x1c0000;" \
//    "bootm 0x50018000"
#define CONFIG_BOOTCOMMAND "nand read 0x50018000 0x100000 0x500000;" \
    "bootm 0x50018000"
#endif 

 修改段偏移地址

#define CONFIG_ENV_OFFSET  0x0080000 

页大小

/* NAND chip page size  */
//#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_PAGE_SIZE 4096 

块大小

/* NAND chip block size  */
//#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)

校验位

/* NAND chip page per block count  */
//#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_COUNT 128 

 

--------------------------------------

在u-boot-nand.lds 中添加:
{
cpu/arm1176/start.o (.text)
cpu/arm1176/s3c64xx/cpu_init.o (.text)
board/samsung/smdk6410/lowlevel_init.o (.text)
cpu/arm1176/nand_cp.o (.text)
lib_arm/board.o (.text)
*(.text)
}
在u-boot.lds 中添加:
{
cpu/arm1176/start.o(.text)
cpu/arm1176/s3c64xx/cpu_init.o (.text)
board/samsung/smdk6410/lowlevel_init.o (.text)
cpu/arm1176/nand_cp.o (.text)
lib_arm/board.o (.text)
*(.text)
}

进入nand_spl/board/ 复制一个smdk6400 为smdk6410,同理修改全部6400为6410

进入makefile:
COBJS = nand_boot.o nand_ecc.o s3c64xx.o nand_cp.o
在下面代码
# from SoC directory
$(obj)cpu_init.S:
@rm -f $@
@ln -s $(TOPDIR)/cpu/arm1176/s3c64xx/cpu_init.S $@
之后添加
$(obj)nand_cp.c:
@rm -f $@
@ln -s $(TOPDIR)/cpu/arm1176/nand_cp.c $@

 

8.接下来是DM9000网卡移植,为什么要移植这个呢,因为没有这个你怎么烧文件系统怎么烧内核啊,貌似跑偏了,得先有nand驱动才能烧

//#define CONFIG_NET_MULTI
//#define CONFIG_CS8900 /* we have a CS8900 on-board */
//#define CONFIG_CS8900_BASE 0x18800300
//#define CONFIG_CS8900_BUS16 /* follow the Linux driver */
然后添加DM9000 网卡的宏定义:
/*-----------------------------------------------------*//* by 2012-4-10 */
#define CONFIG_NET_MULTI 1
#define CONFIG_DM9000_NO_SROM 1
#define CONFIG_dm9000
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x18800300
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE+4)
#define CONFIG_DM9000_USE_16BIT
#define CONFIG_ETHADDR 00:40:5c:26:0a:5b
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 172.16.114.20
#define CONFIG_SERVERIP 172.16.114.10
#define CONFIG_GATEWAYIP 172.16.114.1
//#define CONFIG_DM9000_DEBUG
上面的IP 和网关、子网掩码等根据自己的具体情况进行修改。
接着打开u-boot-2010.03/net/eth.c,并且进入到函数int

eth_initialize(bd_t *bis)中,在:
#if defined(CONFIG_DB64460) || defined(CONFIG_P3Mx)
mv6446x_eth_initialize(bis);
#endif
后面添加下面代码:
/*-----------------------------------*/
/* by 2012-4-10 */
#if defined(CONFIG_DRIVER_DM9000)
dm9000_initialize(bis);
#endif
/*-----------------------------------*/

同样在u-boot-2010.03/net/net.c,
1.将//# define ARP_TIMEOUT 5000UL /* Milliseconds before trying ARP again */
修改成:
# define ARP_TIMEOUT 5 /* Milliseconds before trying ARP again */
2.将if ((t - NetArpWaitTimerStart) > ARP_TIMEOUT)
修改成:
if ((t - NetArpWaitTimerStart) > ARP_TIMEOUT*CONFIG_SYS_HZ)
3.将//NetSetTimeout (10000UL, PingTimeout);
修改成:
NetSetTimeout (10*CONFIG_SYS_HZ, PingTimeout);

接着进入u-boot-2010.03/net/tftp.c,找到void
TftpStart (void)函数,用#if 0 #endif 注释掉下面的程序:
#if 0
/*
* Allow the user to choose TFTP blocksize and timeout.
* TFTP protocol has a minimal timeout of 1 second.
*/
if ((ep = getenv("tftpblocksize")) != NULL)
TftpBlkSizeOption = simple_strtol(ep, NULL, 10);
if ((ep = getenv("tftptimeout")) != NULL)
TftpTimeoutMSecs = simple_strtol(ep, NULL, 10);
if (TftpTimeoutMSecs < 1000) {
printf("TFTP timeout (%ld ms) too low, "
"set minimum = 1000 ms\n",
TftpTimeoutMSecs);
TftpTimeoutMSecs = 1000;
}
debug("TFTP blocksize = %i, timeout = %ld ms\n",

TftpBlkSizeOption, TftpTimeoutMSecs);
#endif

 

进入dm9000x.c,找到static int dm9000_rx(struct eth_device *netdev)
函数,把for(;;){}修改成do{}while.
在do 之前添加:
/*------------------------------------*/
/*2012-4-17*/
DM9000_ior(DM9000_MRRH);
DM9000_ior(DM9000_MRRL);
/*-------------------------------------*/
static void dm9000_halt(struct eth_device *netdev)
{
DM9000_DBG("%s\n", __func__);
/* RESET devie */
//phy_write(0, 0x8000); /* PHY RESET */
//DM9000_iow(DM9000_GPR, 0x01); /* Power-Down PHY */
//DM9000_iow(DM9000_IMR, 0x80); /* Disable all interrupt */
//DM9000_iow(DM9000_RCR, 0x00); /* Disable RX */
}

 

关于网卡驱动的一个bug问题极其解决

ping功能的实现,通过上步得到的uboot使用 ping 时进入循环,不得而出,下面解决此问题。

原因:u-boot.2010.03/net/net.c文件中NetLoop()函数中,数次引用get_timer(0),来计算超时与否,而get_timer(0)总是返回0,因此需要修改get_timer()函数。打开 u-boot.2010.03/cpu/arm1176/s3c64xx/timer.c
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}

此函数并没有什么问题,进入 get_timer_masked(),查看
ulong get_timer_masked(void)
{
unsigned long long res = get_ticks();
do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
return res;
}

get_timer()为0,完全是由于do_div引起的,修改成如下:
ulong get_timer_masked(void)
{
ulong now = read_timer();

if (lastdec >= now) {
/* normal mode */
timestamp += lastdec - now;
} else {
/* we have an overflow ... */
timestamp += lastdec + timer_load_val - now;
}
lastdec = now;

return timestamp;
}

ok,到此解决了ping时进入死循环不出来的bug。但是仍然ping不通。根据打印信息,此时只发了一次包。而ping的原理是:先发一个包(此包中目的ip的mac地址为空,因为此时知道目的ip但不知目的mac),目的主机会做出回应,在dm9000接受到后,上层NetReceive()会把目的主机的mac地址封装到包里,再次发送。

还有几处 添加初始化代码。在board/samsung/SMDK6410/SMDK6410.C

#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
 int rc = 0;
#ifdef CONFIG_DRIVER_DM9000
 rc = dm9000_initialize(bis);

#endif
 return rc;
}



#gedit drivers/net/dm9000x.c

#if//屏蔽掉dm9000_init函数中的这一部分,不然使用网卡的时候会报“could not establish link”的错误
    i = 0;
    while (!(phy_read(1)& 0x20)){    /* autonegation complete bit */
        udelay(1000);
        i++;
        if (i== 10000){
            printf("could not establish link ");
            return 0;
        }
    }
#endif



、、、、、还有大家注意这个网卡驱动ping的时候是很慢的,1-2分钟。有系统和没系统速度相差还是很大的,一般第一次ping不通后来就通了;还有就是用tftp命令连接超快,10秒左右,不知道为什么。。。
 
 9.现在到了最烦人的地方了,添加对yaffs2文件系统的支持,到这里大家估计都不耐烦了吧,坚持一会,最后一步了。
1. 修改include/configs
 #define CONFIG_BOOTDELAY 2
#define CONFIG_BOOTARGS     "root=/dev/mtdblock2 rootfstype=yaffs2 console=ttySAC0,115200"
 
 关于yaffs2移植这篇文献讲得比较好。大家直接按照它来就行 点击打开链接,然后结合这篇博客 点击打开链接

 
 
小结,移植到此结束,这次移植主要完成了几个任务:板载信息修改,nand驱动修改及移植,DM9000网卡移植,添加yaffs2文件系统支持,引导内核。uboot有这些个功能足够了呵呵,后期我会对这些代码详细注释,要知其所以然。明天我会根据这个文档进行重新移植,其中的错误我我会改出来,遇到的bug也会提交到这个文档中。下面进入内核移植篇
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