2015年05月_wuhui_gdnt

07月 06月 05月 03月 01月

原创 dsa算法（24）

1.3.8.2.3.计算图节点标记BUDataStructures::runOnModuleInternal接下来重新计算全局图中各节点的标记、同类集，然后把全局图的相关信息整合入函数图，并计算函数图的方方面面。首先，在85行将全局图节点的未完成标记去掉，在88行将全局对象以外的节点标记为未完成。而对于函数图，在105将全局图有关的全局对象节点的信息克隆、简并进指定图，然后在108行将指定图节

2015-05-20 12:09:55 802

原创 dsa算法（23）

1.3.8.2.1.2. 内联DSGraph1.3.8.2.1.2.1. 非递归或直接递归情形首先考虑只有一个节点的SCC。注意，这意味着没有出现函数递归（这时，在调用链中的函数按从底至上的次序得到处理），或者出现直接函数递归（自己调用自己）。 BUDataStructures::calculateGraphs（续） 432 //433 //

2015-05-20 12:06:42 799

原创 dsa算法（22）

1.3.8. BUDataStructures遍BUDataStructures中的BU是bottom up的缩写，Chris在他的论文里详细描述了这个过程：自底向上（BU）分析阶段通过从每个函数中的函数调用（callees of each function）整合过程间信息，来提炼每个函数的局部图。BU分析的结果是对每个函数汇集了调用该函数总体效果的图（比如强加的别名，及修改/引用信息），该图

2015-05-20 12:01:19 1619

Introduction to Theory of Computation

This is a free textbook for an undergraduate course on the Theory of Computation, which we have been teaching at Carleton University since 2002.Until the 2011/2012 academic year, this course was offered as a second-year course (COMP 2805) and was compulsory for all Computer Science students. Starting with the 2012/2013 academic year, the course has been downgraded to a third-year optional course (COMP 3803).

2018-09-23

Survey on Instruction Selection

Instruction selection is one of three optimization problems involved in the code generator back-end of a compiler. The instruction selector is responsible of transforming an input program from its target-independent representation into a target-specific form by making best use of the available machine instructions. Hence instruction selection is a crucial part of efficient code generation.

2018-09-23

Towards a Compilation infrastructure for network processors

Modern network processors (NPs) typically resemble a highly-multithreaded multiprocessor-ona-chip, supporting a wide variety of mechanisms for on-chip storage and inter-task communication. NP applications are themselves composed of many threads that share memory and other resources,and synchronize and communicate frequently. In contrast, studies of new NP architectures and features are often performed by benchmarking a simulation model of the new NP using independent kernel programs that neither communicate nor share memory. In this paper we present a NP simulation infrastructure that (i) uses realistic NP applications that are multithreaded, share memory, synchronize, and communicate; and (ii) automatically maps these applications to a variety of NP architectures and features. We use our infrastructure to evaluate threading and scaling, on-chip storage and communication, and to suggest future techniques for automated compilation for NPs.

2018-09-23

Crafting a Compiler

Brief Contents 1 Introduction 1 2 A Simple Compiler 31 3 Scanning—Theory and Practice 57 4 Grammars and Parsing 113 5 Top-Down Parsing 143 6 Bottom-Up Parsing 179 7 Syntax-Directed Translation 235 8 Symbol Tables and Declaration Processing 279 9 Semantic Analysis 343 10 Intermediate Representations 391 11 Code Generation for a Virtual Machine 417 12 Runtime Support 445 13 Target Code Generation 489 14 Program Optimization 547

2018-09-01