2016年09月_wuhui_gdnt

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翻译 LLVM的SafeStack缓冲溢出保护的优缺点

作者：SamuelGroß原文地址：http://blog.includesecurity.com/2015/11/LLVM-SafeStack-buffer-overflowprotection.html引子在2015年6月，一个能减少内存破坏，称为SafeStack的新模块，由Google的PeterCollingbourne整合进llvm的开发分支，在将要到来的3.8版发布中可以

2016-09-30 11:24:47 2509

翻译缓冲溢出保护

https://en.wikipedia.org/wiki/Buffer_overflow_protection#Clang.2FLLVM来自Wikipedia，免费的百科全书缓冲溢出保护是在软件开发期间，通过检测栈上分配变量的缓冲溢出，并防止它们导致程序行为异常，或成为严重安全漏洞，来增加可执行程序安全性的各种技术。栈缓冲溢出发生在程序写入该程序调用栈上预期数据结构之外的一个内存地址时，

2016-09-23 11:18:35 1630

翻译 LLVM原子指令与并发指引

原文地址：http://llvm.org/docs/Atomics.html介绍LLVM支持在线程与异步信号面前定义良好的指令。原子指令专门为以下定义来提供可读的IR以及优化的代码生成：· C++11 头文件。（C++11草案在此）。（C11草案在此）。· Java风格内存适用的语义，用于volatile以及规范的共享变量（Java规范）。·

2016-09-09 11:30:52 2983

翻译优化的x64代码的调试挑战

原文地址：https://blogs.msdn.microsoft.com/ntdebugging/2009/01/09/challenges-of-debugging-optimized-x64-code/如果你还没有调试过优化的x64代码的奢华体验，不要等太久而落后于时代！因为x64类似于fastcall的调用惯例与丰富的通用寄存器，查找在调用栈的任意点的变量值确实非常棘手。在本文，我

2016-09-02 11:36:33 2135

Introduction to Theory of Computation

This is a free textbook for an undergraduate course on the Theory of Computation, which we have been teaching at Carleton University since 2002.Until the 2011/2012 academic year, this course was offered as a second-year course (COMP 2805) and was compulsory for all Computer Science students. Starting with the 2012/2013 academic year, the course has been downgraded to a third-year optional course (COMP 3803).

2018-09-23

Survey on Instruction Selection

Instruction selection is one of three optimization problems involved in the code generator back-end of a compiler. The instruction selector is responsible of transforming an input program from its target-independent representation into a target-specific form by making best use of the available machine instructions. Hence instruction selection is a crucial part of efficient code generation.

2018-09-23

Towards a Compilation infrastructure for network processors

Modern network processors (NPs) typically resemble a highly-multithreaded multiprocessor-ona-chip, supporting a wide variety of mechanisms for on-chip storage and inter-task communication. NP applications are themselves composed of many threads that share memory and other resources,and synchronize and communicate frequently. In contrast, studies of new NP architectures and features are often performed by benchmarking a simulation model of the new NP using independent kernel programs that neither communicate nor share memory. In this paper we present a NP simulation infrastructure that (i) uses realistic NP applications that are multithreaded, share memory, synchronize, and communicate; and (ii) automatically maps these applications to a variety of NP architectures and features. We use our infrastructure to evaluate threading and scaling, on-chip storage and communication, and to suggest future techniques for automated compilation for NPs.

2018-09-23

Crafting a Compiler

Brief Contents 1 Introduction 1 2 A Simple Compiler 31 3 Scanning—Theory and Practice 57 4 Grammars and Parsing 113 5 Top-Down Parsing 143 6 Bottom-Up Parsing 179 7 Syntax-Directed Translation 235 8 Symbol Tables and Declaration Processing 279 9 Semantic Analysis 343 10 Intermediate Representations 391 11 Code Generation for a Virtual Machine 417 12 Runtime Support 445 13 Target Code Generation 489 14 Program Optimization 547

2018-09-01