一、本课程设计的性质、目的、任务
《计算机组成与系统结构课程设计》是计算机学院各专业集中实践性环节之一,是学习完《计算机组成与系统结构》课程后进行的一次全面的综合练习。其目的是综合运用所学计算机原理知识,设计并实现一台模型计算机,以便巩固所学的知识,提高分析问题和解决问题的能力。
二、本课程设计的基本理论
1、掌握算术、逻辑、移位运算实验,熟悉ALU运算控制位的运用。
2、掌握存储器组织、读写方式及与总路线组成的数据通路,掌握地址总线、数据总线的工作原理。
3、掌握指令结构和指令取指、执行工作过程。
4、掌握CPU的微程序控制原理。
三、题目
1、综合运用所学计算机原理知识,设计并实现具有以下指令集结构的模型计算机:
编号 | 助记符 | 机器指令码 | 说明 |
1 | IN Rd,IOL | 0001Rd00 | i/o(数据开关)低字节→rs |
2 | OUT IOH,Rs | 001000Rs | Rs→i/o(数据开关)高字节 |
3 | LDA Rd,M | 0011Rd00 XXXXXXXX XXXXXXXX | [M] →RD |
4 | STA M,Rs | 010000Rs XXXXXXXX XXXXXXXX | Rs→[M] |
5 | ADD Rd,Rs | 0101RdRs | Rd+Rs→Rd |
6 | SUB Rd,Rs | 0110RdRs | Rd-Rs→Rd |
7 | RL Rd | 0111Rd00 | Rd循环左移一位 |
8 | RR Rd | 1000Rd00 | Rd循环右移一位 |
9 | MOV Rd,Rs | 1001RdRs | Rs→Rd |
10 | JMP M | 10100000 XXXXXXXX XXXXXXXX | [M]→PC,即跳转到M所指单元 |
11 | JZ M | 10110000 XXXXXXXX XXXXXXXX | 当Z=1时,跳转到M所指单元 |
12 | JC M | 11000000 XXXXXXXX XXXXXXXX | 当CY=1时,跳转到M所指单元 |
13 | CLR Rd | 1101Rd00 | 将Rd清零 |
14 | DEC Rd | 1110Rd00 | 将Rd值减1 |
15 | HALT | 11110000 | 停机 |
其中,高4位为指令操作码,M为16位存储器地址, Rs为源寄存器,Rd为目的寄存器,占2位,并规定:
Rs或Rd | 选定的寄存器 |
00 01 10 11 | R0 R1 R2 R3 |
2、利用上述指令集编写汇编程序,并在所设计的模型计算机上调试通过:
用累加的方法实现字节乘法(不溢出情况),被乘数:R0,乘数:R1,积:R2并输出至I/O。
四、数据格式及指令系统
1.数据格式
模型机规定采用定点补码表示数据,且字长为8位,其格式如下:
7 | 6 5 4 3 2 1 0 |
符号 | 尾 数 |
2.指令格式
模型机设计四大类指令共 条,其中包括算术逻辑指令、I/O指令、访问及转移指令和停机指令。
⑴ 算术逻辑指令
设计算术逻辑指令并用单字节表示,寻址方式采用寄存器直接寻址,其格式如下:
7 6 5 4 | 3 2 | 1 0 |
OP-CODE | Rd | Rs |
其中,OP-CODE为操作码,Rs为源寄存器,Rd为目的寄存器,并规定:
Rs或Rd | 选定的寄存器 |
00 01 10 11 | R0 R1 R2 R3 |
⑵ 访问指令及转移指令
模型机设计2条访问指令,即存数(STA)、取数(LDA),2条转移指令,即无条件转移(JMP)、结果为零转移(JZ)、有进位转移指令(JC),指令格式为:
7 6 5 4 | 3 2 | 1 0 |
OP-CODE | Rd | Rs |
D(低八) | ||
D(高八) |
⑶ I/O指令
输入(IN)和输出(OUT)指令采用单字节指令,其格式如下:
IN:
7 6 5 4 | 3 2 | 1 0 |
OP-CODE | Rd | 0 0 |
OUT:
7 6 5 4 | 3 2 | 1 0 |
OP-CODE | 0 0 | Rs |
⑷ 停机指令
指令格式如下:
7 6 5 4 | 3 2 | 1 0 |
OP-CODE | 0 0 | 0 0 |
HALT指令,用于实现停机操作。
1. 目标寄存器的寻址控制
1) 当OP=0、R/M=1时,将IR3、IR2作为目标寄存器地址;
2. 源寄存器的寻址控制
1) 当XP=1时,将IR1、IR0作为源寄存器地址。
助记符 | 指令格式 | 功 能 | |||||
LDA Rd,M | 0 | 0 | 1 | 1 | Rd | 00 | [M]→RD |
STA M,Rs | 0 | 1 | 0 | 0 | 00 | Rs | Rs→[M] |
JMP M | 1 | 0 | 1 | 0 | 00 | 00 | [M]→PC |
JZ M | 1 | 0 | 1 | 1 | 00 | 00 | 当Z=1时,[M]→PC |
JC M | 1 | 1 | 0 | 0 | 00 | 00 | 当CY=1时,[M]→PC |
MOV Rd,Rs | 1 | 0 | 0 | 1 | Rd | Rs | Rs→Rd |
ADD Rd,Rs | 0 | 1 | 0 | 1 | Rd | Rs | Rs+Rd→Rd |
SUB Rd,Rs | 0 | 1 | 1 | 0 | Rd | Rs | Rd-Rs→Rd |
CLR Rd | 1 | 1 | 0 | 1 | Rd | 00 | 0→Rd |
DEC Rd | 1 | 1 | 1 | 0 | 00 | Rd | Rd-1→Rd |
RR Rd | 1 | 0 | 0 | 0 | Rd | 00 | Rd循环右移一位 |
RL Rd | 0 | 1 | 1 | 1 | Rd | 00 | Rd循环左移一位 |
IN Rd,I/O | 0 | 0 | 0 | 1 | Rd | 00 | I/O→Rd |
OUT Rs,I/O | 0 | 0 | 1 | 0 | 00 | Rs | Rs→I/O |
HALT | 1 | 1 | 1 | 1 | 00 | 00 | 停机 |
3.指令系统
助记符 | 操作数 | 指令码 | 长度 | 说明 |
IN | R0,IOL | 10 | 1 | I/O(数据开关)低字节→R0 |
IN | R1,IOL | 14 | 1 | I/O(数据开关)低字节→R1 |
IN | R2,IOL | 18 | 1 | I/O(数据开关)低字节→R2 |
IN | R3,IOL | 1C | 1 | I/O(数据开关)低字节→R3 |
OUT | IOH,R0 | 20 | 1 | R0→I/O(数据开关)高字节 |
OUT | IOH,R1 | 21 | 1 | R1→I/O(数据开关)高字节 |
OUT | IOH,R2 | 22 | 1 | R2→I/O(数据开关)高字节 |
OUT | IOH,R3 | 23 | 1 | R3→I/O(数据开关)高字节 |
LDA | R0,* | 30 | 3 | [M]→R0 |
LDA | R1,* | 34 | 3 | [M]→R1 |
LDA | R2,* | 38 | 3 | [M]→R2 |
LDA | R3,* | 3C | 3 | [M]→R3 |
STA | *,R0 | 40 | 3 | R0→[M] |
STA | *,R1 | 41 | 3 | R1→[M] |
STA | *,R2 | 42 | 3 | R2→[M] |
STA | *,R3 | 43 | 3 | R3→[M] |
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ADD | R0,R0 | 50 | 1 | R0+R0→R0 |
ADD | R0,R1 | 51 | 1 | R0+R1→R0 |
ADD | R0,R2 | 52 | 1 | R0+R2→R0 |
ADD | R0,R3 | 53 | 1 | R0+R3→R0 |
ADD | R1,R0 | 54 | 1 | R1+R0→R1 |
ADD | R1,R1 | 55 | 1 | R1+R1→R1 |
ADD | R1,R2 | 56 | 1 | R1+R2→R1 |
ADD | R1,R3 | 57 | 1 | R1+R3→R1 |
ADD | R2,R0 | 58 | 1 | R2+R0→R2 |
ADD | R2,R1 | 59 | 1 | R2+R1→R2 |
ADD | R2,R2 | 5A | 1 | R2+R2→R2 |
ADD | R2,R3 | 5B | 1 | R2+R3→R2 |
ADD | R3,R0 | 5C | 1 | R3+R0→R3 |
ADD | R3,R1 | 5D | 1 | R3+R1→R3 |
ADD | R3,R2 | 5E | 1 | R3+R2→R3 |
ADD | R3,R2 | 5F | 1 | R3+R3→R3 |
SUB | R0,R0 | 60 | 1 | R0-R0→R0 |
SUB | R0,R1 | 61 | 1 | R0-R1→R0 |
SUB | R0,R2 | 62 | 1 | R0-R2→R0 |
SUB | R0,R3 | 63 | 1 | R0-R3→R0 |
SUB | R1,R0 | 64 | 1 | R1-R0→R1 |
SUB | R1,R1 | 65 | 1 | R1-R1→R1 |
SUB | R1,R2 | 66 | 1 | R1-R2→R1 |
SUB | R1,R3 | 67 | 1 | R1-R3→R1 |
SUB | R2,R0 | 68 | 1 | R2-R0→R2 |
SUB | R2,R1 | 69 | 1 | R2-R1→R2 |
SUB | R2,R2 | 6A | 1 | R2-R2→R2 |
SUB | R2,R3 | 6B | 1 | R2-R3→R2 |
SUB | R3,R0 | 6C | 1 | R3-R0→R3 |
SUB | R3,R1 | 6D | 1 | R3-R1→R3 |
SUB | R3,R2 | 6E | 1 | R3-R2→R3 |
SUB | R3,R2 | 6F | 1 | R3-R3→R3 |
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RL | R0 | 70 | 1 | R0循环左移一位 |
RL | R1 | 74 | 1 | R1循环左移一位 |
RL | R2 | 78 | 1 | R2循环左移一位 |
RL | R3 | 7C | 1 | R3循环左移一位 |
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RR | R0 | 80 | 1 | R0循环右移一位 |
RR | R1 | 84 | 1 | R1循环右移一位 |
RR | R2 | 88 | 1 | R2循环右移一位 |
RR | R3 | 8C | 1 | R3循环右移一位 |
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MOV | R0,R0 | 90 | 1 | R0→R0 |
MOV | R0,R1 | 91 | 1 | R1→R0 |
MOV | R0,R2 | 92 | 1 | R2→R0 |
MOV | R0,R3 | 93 | 1 | R3→R0 |
MOV | R1,R0 | 94 | 1 | R0→R1 |
MOV | R1,R1 | 95 | 1 | R1→R1 |
MOV | R1,R2 | 96 | 1 | R2→R1 |
MOV | R1,R3 | 97 | 1 | R3→R1 |
MOV | R2,R0 | 98 | 1 | R0→R2 |
MOV | R2,R1 | 99 | 1 | R1→R2 |
MOV | R2,R2 | 9A | 1 | R2→R2 |
MOV | R2,R3 | 9B | 1 | R3→R2 |
MOV | R3,R0 | 9C | 1 | R0→R3 |
MOV | R3,R1 | 9D | 1 | R1→R3 |
MOV | R3,R2 | 9E | 1 | R2→R3 |
MOV | R3,R2 | 9F | 1 | R3→R3 |
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JMP | * | A0 | 3 | [M]→PC,即跳转到M所指单元 |
JZ | * | B0 | 3 | 当Z=1时,跳转到M所指单元 |
JC | * | C0 | 3 | 当CY=1时,跳转到M所指单元 |
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CLR | R0 | D0 | 1 | 将R0清零 |
CLR | R1 | D4 | 1 | 将R1清零 |
CLR | R2 | D8 | 1 | 将R2清零 |
CLR | R3 | DC | 1 | 将R3清零 |
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DEC | R0 | E0 | 1 | 将R0值减1 |
DEC | R1 | E4 | 1 | 将R1值减1 |
DEC | R2 | E8 | 1 | 将R2值减1 |
DEC | R3 | EC | 1 | 将R3值减1 |
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HALT | “” | F0 | 1 | 停机 |
五、微程序流程图
六、微指令代码
微址00002)1) | M23 | M22 | M21 | M20 | M19 | M18 | M17 | M16 | 代码 | M15 | M14 | M13 | M12 | M11 | M10 | M9 | M8 | 代码 | M7 | M6 | M5 | M4 | M3 | M2 | M1 | M0 | 代码 | 后续微址 | 说明 | |
E/M | IP | MWR | R/M | o2 | o1 | O0 | OP | M | CN | S2 | S2 | S0 | X2 | X1 | X0 | XP | W | ALU | Iu | IE | IR | Icz | Ids | |||||||
000 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | 空操作 | |
001 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | bf | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | F8 | 可变 | ibus→ir | |
620 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | F0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | fc | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 6d | 001 | i/o→rd | |
640 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | f5 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | f9 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ed | 001 | rS→i/o | |
660 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | fa | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bl | |
661 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | bb | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bh | |
662 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | bc | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | c6 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 3F | +1 | bx→ar | |
663 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 70 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ed | 001 | ROm→rd | |
680 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | fa | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bl | |
681 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | bb | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bh | |
682 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | bc | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | c6 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 3F | +1 | bx→ar | |
683 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 5f | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | F9 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ed | 001 | rd→ROm | |
6a0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | fa | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | b9 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | Df | +1 | rs→bl | |
6a1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | f8 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | f9 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 5f | +1 | rd→al | |
6a2 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | F1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 66 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 4d | 001 | a+b→rd | |
6c0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | F8 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | b9 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | Df | +1 | rD→Al | |
6c1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | FA | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | B9 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 5f | +1 | rS→Bl | |
6c2 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | f1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 6e | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 4d | 001 | a-b→rd | |
6E0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | f8 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | f9 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 5f | +1 | rd→al | |
6E1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | F0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 56 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 4d | 001 | a左移→rd | |
700 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | f8 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | f9 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 5f | +1 | rd→al | |
701 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | F0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 5e | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 4d | 001 | a右移→rd | |
720 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | F0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | f9 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 6d | 001 | rs→rd | |
740 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | fa | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bl | |
741 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | bb | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bh | |
742 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 3f | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | c6 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 2d | 001 | bx→pc | |
760 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | fa | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bl | |
761 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | bb | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bh | |
762 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | bc | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | c6 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 3F | +1 | bx→ar | |
763 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | C6 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | FC | 764+z | 条件变址 | |
764 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ed | 001 | 空操作 | |
765 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 3f | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | c6 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 2d | 001 | bx→pc | |
780 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | fa | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bl | |
781 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | bb | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | fb | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | +1 | ROm→bh | |
782 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | bc | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | c6 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 3F | +1 | bx→ar | |
783 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | C6 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | F5 | 784+CY | 条件变址 | |
784 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ff | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ed | 001 | 空操作 | |
785 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 3f | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | c6 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 2d | 001 | bx→pc | |
微址00002)1) | M23 | M22 | M21 | M20 | M19 | M18 | M17 | M16 | 代码 | M15 | M14 | M13 | M12 | M11 | M10 | M9 | M8 | 代码 | M7 | M6 | M5 | M4 | M3 | M2 | M1 | M0 | 代码 | 后续微址 | 说明 | |
E/M | IP | MWR | R/M | o2 | o1 | O0 | OP | M | CN | S2 | S2 | S0 | X2 | X1 | X0 | XP | W | ALU | Iu | IE | IR | Icz | Ids | |||||||
7A0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | F0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | de | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 4d | 001 | 0→rd | |
7C0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | f8 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | f9 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 5f | +1 | rd→al | |
7C1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | F0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | D6 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 4d | 001 | A-1→rd | |
7E0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | F8 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | F8 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1F | +1 | PC->AX | |
7E1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 3F | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | D6 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0D | 001 | AX-1->PC |
十、参考资料
1、无锡达爱思科教仪器厂自编.《十六位体系结构计算机组成原理实验指导书(第三版)》 2012年6月。重点参考其中的“分段模型机的设计与实现”(3.2节)、“带移位运算的模型机的设计与实现”(3.3节)、“复杂模型机的设计与实现”(3.4节)。
2、《计算机组成原理微控制器编程手册》。
3、《计算机组成与系统结构》,袁春风著。