storage protocols

1. When an n byte transfer is indicated by an address a, the memory bytes refered to are those at the addresses a, a+1, ...a+n-1. All architectures do this.

2. When an n byte number is stored in memory, its bytes are stored in order of significance, least significant bytes in the lowest address(little endian). Numerically inceasing addresses correspond to increasing byte significance. Not all architectures do this.

 

Architectures which use the byte ordering given in the second of these protocols are called little endian . Architectures which do the opposite are called big endian .

 

Alignment

The wires on the address bus are A31 through A2. A1 and A0 are missing. From a hardware point of view, a 386 addresses 2³⁰ 32-bit words. The 232 * 8 bit memory is a fiction. In code which is accessing a large number of consecutive memory locations, for bytes at a time, performance will be cut in half if the addresses called are not those whose bottom two bits are 0, i.e. a multiply of 4. Memory transfers which straddled four-byte word boundaries are said to be out of alignment .