为这段代码加注释module sy2(a,b,c,d,e,f,g,sel,clk,en); output a,b,c,d,e,f,g; output [7:0]sel; input [7:0] en; input clk; reg a,b,c,d,e,f,g; reg [7:0] sel; reg clk_reg; reg [8:0] count; reg [2:0] state; parameter s0=3'd0,s1=3'd1,s2=3'd2,s3=3'd3, s4=3'd4,s5=3'd5,s6=3'd6,s7=3'd7; always@(posedge clk) if(count==9'd400) begin clk_reg<=~clk_reg; count<=9'd0; end else count<=count+9'd1; always@(posedge clk_reg) begin case(state) s0: begin if(en[7]) begin sel<=8'b0111_1111; {a,b,c,d,e,f,g}<=7'b1101101; end else sel<=8'b1111_1111; state<=s1; end s1: begin if(en[6]) begin sel<=8'b1011_1111; {a,b,c,d,e,f,g}<=7'b1111110; end else sel<=8'b1111_1111; state<=s2; end s2: begin if(en[5]) begin sel<=8'b1101_1111; {a,b,c,d,e,f,g}<=7'b1111110; end else sel<=8'b1111_1111; state<=s3; end s3: begin if(en[4]) begin sel<=8'b1110_1111; {a,b,c,d,e,f,g}<=7'b1101101; end else sel<=8'b1111_1111; state<=s4; end s4: begin if(en[3]) begin sel<=8'b1111_0111; {a,b,c,d,e,f,g}<=7'b1111110; end else sel<=8'b1111_1111; state<=s5; end s5: begin if(en[2]) begin sel<=8'b1111_1011; {a,b,c,d,e,f,g}<=7'b1101101; end else sel<=8'b1111_1111; state<=s6; end s6: begin if(en[1]) begin sel<=8'b1111_1101; {a,b,c,d,e,f,g}<=7'b1111110; end else sel<=8'b1111_1111; state<=s7; end s7: begin if(en[0]) begin sel<=8'b1111_1110; {a,b,c,d,e,f,g}<=7'b1111001; end else sel<=8'b1111_1111; state<=s0; end default:state<=s0; endcase end endmodule