DDR4 To DDR5
JEDEC DDR Generations
DDR5 | DDR4 | DDR3 | LPDDR5 | |
---|---|---|---|---|
Max Die Density | 64Gb | 16Gb | 4Gb | 32Gb |
Max UDIMM Size(DSDR) | 128GB | 32GB | 8GB | N/A |
Max Data Rate | 6.4GT/s(8.4GT/s) | 3.2GT/s | 1.6GT/s | 6.4GT/s |
Channels | 2 | 1 | 1 | 1 |
Total Width(Non-ECC) | 32bits*2 | 64bits | 64bits | 16bits |
Total Width(ECC) | 40bits*2 | 72bits | 72bits | - |
Banks(Per Group) | 4 | 4 | 8 | 16 |
Bank Groups | 8/4 | 4/2 | 1 | 4 |
Burst Length | BL16(BL32) | BL8 | BL8 | BL16 |
Voltage (Vdd) | 1.1v | 1.2v | 1.5v | 1.05v |
Vddq | 1.1v | 1.2v | 1.5v | 0.5v |
Vpp | 1.8v | 1.8v | - | - |
DDR5 At a Glance
-
Fewer CA pins - 14 pins now support 2 channels
-
7 CA pins per Channel to logical and 14 pins to DRAM
– Fully encoded Commands for DDR5 - CKE&ODT removed
1) New Command Truth Table 1&2 cycle commands
2) Module logic uses DDR and DRAM is always SDR
3) New High Speed sideband bus - I2C&I3C(12.5M) -
Two independent channels per DIMM - new for DDR5
– 2-40 bit Data paths per DIMM, each with 14 bits of Address&Command -
Higher Density - Support for 8Gbit to 64Gbit Device
– TSV/3DS - 4H to 8H more memory address space than DDR4 -
Higher Bandwidth - every generation doubles bits per second
– First reversion probably 4800Mbps
– 6400Mbps and possibly higher in later revisions -
More Reliable - On Die ECC
Multi-Die Options for DDR5
DDR5 will not have DDP Module
DDR5 and DDR4 LRDIMM Comparison
DDR5 DIMM Module have 288pins(no change from DDR4 to DDR5)